SIMM, Address Lines Order?

[Scott Stevens]

On Mon, 26 Sep 2005 10:35:16 -0400
Allison <ajp166 at bellatlantic.net> wrote:

> >
> >Subject: Re: SIMM, Address Lines Order?
> >   From: woodelf <bfranchuk at jetnet.ab.ca>
> >   Date: Mon, 26 Sep 2005 08:18:24 -0600
> >     To: General Discussion: On-Topic and Off-Topic Posts
<cctalk at classiccmp.org>
> >
> >der Mouse wrote:
> >>>When connecting DRAM chips to the pins of a SIMM (i.e. laying out
the
> >>>traces) does it matter if the  order of the address and data lines
is
> >>>preserved?  [...]
> >> 
> >> 
> >> What about refreshes?  (This is a question, not a challenge; I do
not
> >> know enough about how dynamic RAM refresh works to know whether
this
> >> really is relevant.  But it seems to me that it might be.)
> >> 
> >
> >Just that all of them gets refeshed in the alloted time.
> >Note they just have to be read for refesh. Still you better
> >check the data sheets if you got them for the fine print.
> 
> If your using cas\ only refresh then the data lines are not used
> as that is done with internal refresh counter.
> 
> Tim Olmstead wrote a Z80 Dram interfacing manual thats around the net
> and cover simms as well as the ram on them. Very useful.  I have an 
> electronic copy locally if needed. 
> 

The Z80 has DRAM refresh functionality built right into the processor,
if I'm remembering right.