SIMM, Address Lines Order?

[Dwight K. Elvey]

>From: "der Mouse" <mouse at rodents.montreal.qc.ca>
>
>> When connecting DRAM chips to the pins of a SIMM (i.e. laying out the
>> traces) does it matter if the  order of the address and data lines is
>> preserved?  [...]
>
>What about refreshes?  (This is a question, not a challenge; I do not
>know enough about how dynamic RAM refresh works to know whether this
>really is relevant.  But it seems to me that it might be.)

Hi
 Only that the first address lines that are used for refresh
need to be grouped. As example for a 128 cycle refresh, that would
be that one could mix any of the A0-A6 lines. This is because
of how the blocks of RAM are accessed and then selected by
a mux to the output. If you took a 128 cycle refresh and swapped
A0 with A7, only half the arrays would get refresh. It still
might not be an issue, depending on software and other hardware.
One can do refresh by just reading the array, such as a DMA for
video out might do.
Dwight

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