GPIB state machine info WTD

[Tony Duell]

> 
> Hi,
>   Does anyone happen to have any data on the GPIB state machine, or perhaps a

I built a GPIB interface from TTL years ago, from what I remember it was 
quite simple. Let me see if I can find schematics if you don't get more 
useful replies.

I also designed a GPIB listener state machine in a GAL. Again I should 
have the equations somewhere...

> GPIB slave interface implemented in LSTTL? I'm trying to rig up a CPLD to
> take some of the load off the microprocessor in one of my projects, but the
> GPIB is troublesome to say the least.
>   I've got a copy of the HP "Tutorial guide to HPIB" and "PET and the IEEE488
> Bus", but none of them cover the state machine...

Be _very_ careful if you use designs intended for the PET. The PET was 
very forgiving in the timing of the peripherals. I have a commercial PET 
RS232 interface that contains a UART chip, RS232 buffers, a few TTL chips 
as SR latches to hold the talk and listen states, an EPROM as the code 
converter (PERSCI-ASCII) and talk/listen address detector) and another 
EPROM as the handshake control logic. Due to the fact there are no 
latches in the latter section, the timing goes all over the place. It 
works on the PET, it doesn't work on any HP machine I've tried it with.

-tony