datasheets for 82S21 - Signetics 32x2 SRAM? : pdp2

[woodelf]

Tony Duell wrote:
>>Ummm what about a 7480  :)
> 
> 
> A gated full adder? (I had to look it up...). I have a data sheet which 
> even includes a transistor-level schematic.
> 
Hmm that is not web ... drat .
I am guessing that is about 15 ns delay.
I am using CPLD's rather than TTL since I don't have get BIG
PCB's made up, as well as the CPLD language is simple logic
equations rather than * Your Favorite big $$$ hardware design
language * as with FPGA's, but it nice to compare what real
TTL speeds are.

> 
> Prolbems are that I can't access the web or read CD-ROMs at my workbench 
> where I do most of my designing (I prefer to design with real components 
> and a soldering iron), and anyway, it's a lot easier to flip through a 
> databook looking for interesting chips than to display a pdf (every 
> machine I've ever used, including fast PCs owned by friends of mine, take 
> a noticeable time to display a page from a pdf file. A lot longer than it 
> takes me to glance at a page and see if it could possibly include the 
> information I am looking for).

While surfing the web for a better way to do a ALU I found a
hardware design for a Pdp 2. http://www.locl.net/homes/pdp2/
While I think using 74XX's is better for vintage hardware so you
have more a idea of realistic timing I wish him good luck.

> -tony