FPGA VAX update

[a.carlini at ntlworld.com]

der Mouse wrote:
>> And of course, with a VAX, you have the bloody instruction fetch and
>> decode stuff which really is a pain.  [...]  Worst instructions take
>> five arguments if I remember correctly.
> 
> Eight instructions take six.  Five of them (addp6, subp6, mulp, divp,
> ashp) are packed-decimal and thus may not be in silicon or microcode,
> and two (movtc, movtuc) are relatively rare string operations, but
> the other (index) is simple and (for some languages) heavily used;
> I'd expect at least that one to be done in silicon/microcode.  (And
> for the other seven, even if they're just traps to macrocode as they
> are on (eg) the uVII, I *think* you need to do at least rudimentary
> argument parsing before taking the trap.)     

A favourite game used to be to come up with the longest possible
legal VAX instruction. I forget the exact answer but it was in the
region of 54 bytes. That's actual I-stream decoded instruction
bytes, tables for MOVxxx or whatever do not count. I think the
solution is to pick something like ADDP6 and make each of 
the arguemnts as long as possible (which is five or six bytes or so).

The other game was to come up with a scenario for the most
page-faults possible while executing a single instruction.

I expect that building an Alpha might be straightforward in
comparison :-) I still think that a CPU is not a VAX until
it passes AXE (and I believe that CHARON-VAX has been so tested,
no idea about SIMH).

Antonio

-- 

Antonio carlini
arcarlini at iee.org