FPGA VAX update, now DIY TTL computers

[Chuck Guzis]

On 11/11/2005 at 4:29 PM woodelf wrote:

>I would bit slice would be better for that route, it is lot of 
>instruction types
>that add up with multi-address opcodes.

I'd think that this would be quite the reverse.  Aren't most RISC
architectures 3-address?  Ostensibly this is because the instructions are
simpler and easier to execute in a single cycle.

Am I missing something?

Cheers,
Chuck