FPGA VAX update, now DIY TTL computers

[Holger Veit]

woodelf wrote:

> Stegeman, Henk HJ SITI-ITIBHW5 wrote:
>
>> The reason is the effort it takes......
>> Ask anybody who actually  made a CPU  ( I myself did a 12 bit
>>  TTL based, single address single accumulator machine).
>> The real effort is actually building and debugging the unit.
>>  There is only so much time you have....
>>  
>>
>>> I've always thought that 24 bits is a nice word size for a small 
>>> computer.
>>>   
>>
>>
>> Much too big to actually build in TTL.
>>
>>
> Well everybody likes 12 bits...

Which is what I don't understand from my experiences with my own CPU 
long ago. 16 bit would be okay and maybe even more bits, but I decided 
against classical 4, 8 or 12 bits those days, although these sizes were 
quite popular then for "real" CPUs. The point is that I didn't want to 
have sophisticated instruction decoding logic, this disallowed multiple 
word instructions. I knew about microprogramming, of course, but this 
were out of reach because of lacking facilities to burn PROMs (I was a 
pupil then).
For memory addresses and immediate operands, this meant a single 
instruction should hold enough address or data bits. With 12 bits you 
are restricted to too few possible instructions or too few address bits 
(4 bit instruction or 8 bit address/immediate data was not enough for my 
ambitious plans. 16 bit were suitable even if it required two "load 
immediate" instructions (for the low and the high byte). However the 
first architecture had 16 bit instructions but an 8 bit data path only 
(except the separate 12 bit address increment/index logic).

Holger