FPGA VAX update, now DIY TTL computers

[der Mouse]

> There was a spate of "fake parity" memory around some time in the
> 90s.  Quite why it was cheaper to add a chip that always supplied
> "correct" parity rather than simply using additional memory was
> something that I never understood.

Because fake parity needs just 2*lg(N)-1 XOR gates (N being the number
of data bits per word), one of them being NXOR if odd parity is used;
real parity needs 2^M memory cells (M being the number of address
lines).  For any memory configuration that made it out of the lab, fake
parity is orders of magnitude less complicated a chip - and
correspondingly cheaper.

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