FPGA VAX update

[Allison]

>
>Subject: Re: FPGA VAX update
>   From: Paul Koning <pkoning at equallogic.com>
>   Date: Thu, 03 Nov 2005 11:40:57 -0500
>     To: cctalk at classiccmp.org
>
>>>>>> "Chuck" == Chuck Guzis <cclist at sydex.com> writes:
>
> Chuck> On 11/3/2005 at 9:49 AM Paul Koning wrote:
> >> If you're going to go the 3 address route, it sounds like you're
> >> well on your way towards reinventing the CDC 6000 architecture.
> >> And of course that would be a fine thing to do -- if you're going
> >> to explore computer architectures, what better path to take than
> >> the one first walked by the foremost computer architecture genius
> >> of the 20th century?
>
> Chuck> ...or one could use a MIPS chip...
>
> Chuck> To me, the genius (and unrecognized at the time) of the 6600
> Chuck> architecture was Cray's discarding the idea of a "condition
> Chuck> code" in the IBM sense, wherein the state of a result is
> Chuck> actually divorced from the result itself. 
>
>That's useful indeed, though there were plenty of other machines back
>then where this was true.  I believe the more significant innovations
>were the extensive parallelism and the quantity of registers.

A lot of those ideas were result of experimental machines that preceeded 
them.  TX2 came to mind as it had fast registers and core. Other ideas
embodied were dual ALU, it could be used as 18bits or two 9bit alu.
While the machine was a test bed to transistor logic it was also a 
system archetecture test bed as well.

>Sure was.  600 timesharing terminals on a pair of 10 MHz processors is
>pretty slick.  (Come to think of it, over 9000 timesharing terminals
>on a single Alpha-based descendant of that system is mighty
>impressive, too.)
>
>	    paul

I remember the BOCES LIRICS (LI NY) PDP-10 system in 1971 running around 
500users at anyone time.  Used to run a lot of idle cycles even them.

Allison