FPGA VAX update

Brian Wheeler bdwheele at indiana.edu
Wed Nov 2 14:03:11 CST 2005


On Wed, 2005-11-02 at 12:51 -0700, woodelf wrote:
> Brian Wheeler wrote:
> 
> >I took a hardware class where we (each team of 2 students) had to build
> >a PDP-8 using PALs, some 74xx chips, a bit of Static RAM, and a ton of
> >wire wrapping.  The final exam consisted of the instructor breaking each
> >machine in 5 different ways and we 3 hours to fix it.  That was a pretty
> >cool class.
> >
> >  
> >
> What type of 8 did you model and did you leave out any features like 
> extended memory?
> 

I don't know which model in particular we built...
As I recall, we were limited to 4K words.  As for I/O, we had the
switches/leds and a serial terminal.  The board we built them on had all
of the switches and LEDs mounted, but not wired up.  The serial port was
also wired (1488/1489), but no connection to the area where we were
building the cpu.  I hated that we couldn't take that home after the
class!

Since IOT was fully implemented, I suppose we could have built
peripherals as needed.   The 2nd semester of the class was based around
the 6809.  The projects then usually consisted of making a floppy
interface (along with driver changes for Flex) or
project-of-your-own-making.  I build a memory pager which would let you
swap 1K chunks in and out of the address space to a bank of 256K.

Brian


> >I hear they use FPGAs now in the class...kids these days.
> >
> >  
> >
> I grumble that the FPGA's now days have built in hardware features that hide
> real logic slowdowns like external memory or slow ripple carry.
> 
> >Brian
> >  
> >
> 



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