TD100 delay line chip?
lee davison
leeedavison at yahoo.co.uk
Wed Aug 31 15:18:51 CDT 2005
They're just LC delay lines with schmitt output buffers.
Each delay step is a T network with the L component on
the arms of the T and the C component to ground.
Any signal on the input appears xx nanoseconds later on
each of the tap outputs.
Lee.
___________________________________________________________
To help you stay safe and secure online, we've developed the all new Yahoo! Security Centre. http://uk.security.yahoo.com
More information about the cctalk
mailing list