Floppy controller questions

[Allison]

>
>Subject: Re: Floppy controller questions
>   From: Philip Pemberton <philpem at dsl.pipex.com>
>   Date: Tue, 23 Aug 2005 22:47:06 +0100
>     To: cctalk at classiccmp.org
>
>In message <0ILO00FI3MXS1LM0 at vms048.mailsrvcs.net>
>          Allison <ajp166 at bellatlantic.net> wrote:
>
>> Write clock sets the write data rate and should corrospond to the 
>> rate needed for media. Writeclock is 2x data rate.
>
>Does this apply to both FM and MFM? The datasheet suggests a 500kHz WrClk for
>FM and 1MHz for MFM mode, which would give a 250kHz FM data rate and a 500kHz
>MFM data rate. Is that right? 

They are right.  MFM requres twice the clock of FM as it's twice the speed.
Obvious to me. However the statement is valid as the APPLIED clock is 2X 
the DATA rate for any mode. 

One of the confusing issues the fact that when going to MFM (AKA Double Density)
you will always run the clock twice that of FM but the ratios of Wclock to data 
rate is always 2.  The MFM pin can be used to select Wclock or Wclock/2 for 
MFM/FM operation on write and for read it can select clock or other timing 
dependent control for the read_data and read_data_window recovery.

Oh and BTW: those specified data rates would be for 8" drives.  For 5.25
they are half that.


>And RdWindow from the datasep should cover the read frequency variations,
>assuming the datasep can handle the variation in mode and frequency.

Assuming you condition the data seperator for the correct mode with 
MFM output from the FDC.

>> the logic does things like Data Clock recovery, Write precompensation timing
>
>I've heard the term "write precompensation" thrown about a bit - what's the
>purpose of it?

Simply put when you write flux transistions close together they tend to 
push apart or attract (depnding on adjacent flux transistions on media
causing time distortion.  Write precom is a predistortion based on the
bit pattern so the recovery windows will be better.  More important to 
MFM than FM.  Some drives tend to distort more than other based on head 
design and write currents used.

>> Using a 765 for _all_ data rates and both 3.5"/5.25"/8" floppy interfaces
>> implemented with LSttl fills a S100 board completly.
>
>That's why SPLDs (GALs) and CPLDs were invented I guess. Squish the address
>decoder, interface logic, and the data separator into a few LSTTLs and GALs,
>or just throw everything into a single CPLD :)

Yep, helped design and test a mask programmed gate array that reduced the 
minimal base PC from about 15 chips to less than 7 while keeping a good
data sep and write precomp logic.

>> Most designs implemented a subset for 8" or 5.25"/3.5" only 
>> (jumper selected) with much lower parts cost.
>
>That's what I wanted. I don't have any 8" drives, so adding support for them
>is pointless. Ideally, I want a board that has a 6502-type interface on one
>side and a 34-pin IDC connector on the other, with support for most common FM
>and MFM 3.5" and 5.25" formats.

Well the interface for 3.5 and 5.25 are nearly identical and that made most 
of that simple.  the only real differnce is you will likely run twice the clock
rates for 3.5" drive than 5.25". 

>> Yes, it was done on the 1.2MB AT-class machines.  Reminder: every PC with 
>> rare exceptions used a 765 or a derivitive based on the 765 core.
>
>So I've noticed. I managed to get DMA-mode transfers working, but never
>managed to get polled-mode or interrupt-mode transfers working. Guess I'll
>have to learn fast when I start writing code to drive the FDC...

Polled mode is tricky as the loop must wait for data to be ready then 
transfer it. That loop can be as fast as 13us worst case for DD 8"
or 1.44mb 3.5".  If your slow you get data overrun errors.

>> For MFM is when the transiston occurs rather than how many. Generally the 
>> Floppy generates what is by standard expected and the FDC external logic 
>> will regenerate data pulses and data window (data window is a read clock).
>
>Right. So with FM the datasep syncs to the high-frequency signal in Gap1,
>then every time there's a 0 you'll pick up a 0/1/0/1 sequence for each read
>window, and when there's a 1 you'll pick up a 1/1/1/1 sequence?
>
>And with MFM, a 0 after a 0 would be 1/0, a 0 after a 1 would be 0/0 and a 1
>would be 0/1?

Not always.  The rate of transistions and symbols (zero or one) may not be 
one to one for number transistions.  Never quite got MFM in my head as 
clear as FM.

>
>0/1 taken to mean "first data window was empty, second had a pulse in it".

More like a 0 was a longer window than a one. where the FM the window 
always has one transistion and if it's a one then there will be a 
transistion near the middle of the window. 

The trick with floppies is the drive has a narrow bandwidth and the typical 
data rate must be in the range of F and 2F where F is some number of flux 
transistion per unit time (and also realated to per inch at rotation speed).
MFM does some long string things to get the number of transistions to stay 
within F and 2F bit does not have the clear 1:1 symbol corolation of FM.

Of course in real life not much of this is needed to assemble a working
FDC/Floppy interface.


Allison