	.title	srtab
;
;
	.ident	/01.1/
;
;	data tables for send/receive driver
;
;
;	j. s. sventek, 15-aug-80
;
;	01.1	add rsx-11m-plus support
;
;	a. e. scandora, jr., 2-jun-84
;
;	this module provides the loadable driver data tables
;	for the send/receive driver.
;
	.mcall	ucbdf$
	ucbdf$		; define UCB offsets and symbols
ld$sr=0			; driver is loadable
s$$r11=1		; one controller
lgl.f1=160037		; kil ! wlb ! rlb ! att ! det ! acr ! acw ! ace
ctl.f1=0
nop.f1=160030		; att ! det ! acr ! acw ! ace
acp.f1=0
lgl.f2=20007		; dac ! rvb ! wvb ! stp
ctl.f2=20000		; stp
nop.f2=1		; dac
acp.f2=6		; rvb ! wvb - translated to rlb/wlb by drqio
;
;
	.iif df ld$sr,	$srtbl=0
$SRDAT::					; start of data base

.srdcb:						; send/receive DCB
	.word	0				; pointer to next DCB
	.word	.sr0				; pointer to first UCB
	.ascii	/SR/				; device name
	.byte	0,0				; first and last units
	.word	srnd-srst			; length of UCB
	.word	$srtbl				; pointer to dispatch table
	.word	lgl.f1,ctl.f1,nop.f1,acp.f1	; first function mask set
	.word	lgl.f2,ctl.f2,nop.f2,acp.f2	; second function mask set
	.if df	l$$drv
	.word	0				; PCB address for driver
	.endc
	.page
;
;
;	UCB for device
;
;
u.tim1==u.cnt+2				; offsets into UCB for interrupt time
u.tim2==u.tim1+2			; interval in ticks
u.clqb==u.tim2+2			; address of clock queue control block
srst=.
	.if df	m$$mup
	.word	0			; owning tty address
	.endc
.sr0::					; send/receive UCB
	.word	.srdcb			; back ptr to DCB
	.word	.-2			; redirect to self
	.byte	uc.pwf!uc.que		; u.ctl - notify on PWF
	.byte	0			; u.sts
	.byte	0			; u.unit
	.byte	us.red!us.pub		; u.st2 - no redirect and public
	.word	dv.rec			; u.cw1
	.word	0,0			; u.cw2 & u.cw3
	.word	maxbuf			; buffer size
	.word	$sr0			; SCB pointer
	.word	0,0,0,0			; TCB, u.buf, u.buf+2, u.cnt
	.word	0,0,0			; tim1, tim2, clqb
srnd=.
	.page
;
;
;	SCB for device
;
;

	.if ndf	r$$mpl

pr0=0
$sr0::					; send/receive SCB
	.word	0,.-2			; IRP DEQUEUE
	.byte	pr0,0			; device priority, & vector
	.byte	0,2			; current and init timeout
	.byte	0*2,0			; cont index and status
	.word	4			; CSR address
	.word	0			; IRP address
	.word	0,0,0,0			; fork block
	.if df l$$drv&m$$mge
	.word	0			; extra word in fork block
	.endc

	.iff	;ndf r$$mpl

$sr0::					; send/receive SCB
	.word	0,.-2			; IRP DEQUEUE
	.iif df	m$$pro,	.word	0	; unibus run mask
	.word	0,0,0,0			; fork block
	.if df l$$drv&m$$mge
	.word	0			; extra word in fork block
	.endc
	.word	0			; IRP address
	.byte	0,2			; current and init timeout
	.byte	0,0			; s.sts, s.st3
	.word	0			; s.st2
	.word	0			; no krb

	.endc

$SREND::				; end of data base
	.end
