/******************** MODULE INFO  ****************************/
/*
*  File name   :  cla16.sfl
*
*  AUTHOR      :  Yoshihiro Iida (3aepm001@keyaki.cc.u-tokai.ac.jp)
*  VERSION     :  1.0
*  DATE        :  Oct 16, 2003
*
*   Compiler    :  sfl2vl
*   Project     :  POP-11: PDP-11 compatible On Programmable chip
*   Functions   :  16-bit carry lookahead adder of POP-11
*
*
Copyright (c) Yoshihiro Iida, Tokai University, Shimizu Lab., Japan.
(http://shimizu-lab.dt.u-tokai.ac.jp)
This software is the property of Tokai University, Shimizu Lab., Japan.

The POP-11 is free set of files; you can use it, redistribute it
and/or modify it under the following terms:

1. You are not allowed to remove or modify this copyright notice
   and License paragraphs, even if parts of the software is used.
2. The improvements and/or extentions you make SHALL be available
   for the community under THIS license, source code included.
   Improvements or extentions, including adaptions to new architectures/languages,
   SHALL be reported and transmitted to Tokai University, Shimizu Lab., Japan.
3. You must cause the modified files to carry prominent notices stating
   that you changed the files, what you did and the date of changes.
4. You may NOT distribute this set of files under another license without
   explisit permission from Tokai University, Shimizu Lab., Japan.
5. This set of files is free, and distributed in the hope that it will be
   useful, but WITHOUT ANY WARRANTY; without even the implied warranty
   of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
   You SHALL NOT use this software unless you accept to carry all
   risk and cost of defects or limitations.

*
*    ------------  CHANGE RECORD  ----------------
*    Yoshihiro Iida (3aepm001@keyaki.cc.u-tokai.ac.jp) Sep 21, 2004:
*        First free version of this software published.
*
*/

declare cla4 {
	instrin   do;
	input     a<4>,b<4>,ci;
	output    out<4>,n,z,v,c;
	output    gm,pm; 
	instr_arg do(a,b,ci);
}

module cla4 {
	instrin   do;
	input     a<4>,b<4>,ci;
	output    out<4>,n,z,v,c;
	output    gm,pm;
	sel       c0,c1,c2,c3;
	sel       g0,g1,g2,g3;
	sel       p0,p1,p2,p3;
    
	instruct do par{
		g0 = a<0>&b<0>;
		g1 = a<1>&b<1>;
		g2 = a<2>&b<2>;
		g3 = a<3>&b<3>;    
		p0 = a<0>@b<0>;
		p1 = a<1>@b<1>;
		p2 = a<2>@b<2>;
		p3 = a<3>@b<3>;
		c0 = g0|(p0&ci);
		c1 = g1|(p1&g0)|(p1&p0&ci);
		c2 = g2|(p2&g1)|(p2&p1&g0)|(p2&p1&p0&ci);
		c3 = g3|(p3&g2)|(p3&p2&g1)|(p3&p2&p1&g0)|(p3&p2&p1&p0&ci);
		out = (p3@c2)||(p2@c1)||(p1@c0)||(p0@ci);
		c = c3;
		v = c2;
		z = ^(p3@c2) & ^(p2@c1) & ^(p1@c0) & ^(p0@ci);
		n = p3@c2;
		gm = g3|(p3&g2)|(p3&p2&g1)|(p3&p2&p1&g0);
		pm = p3&p2&p1&p0;
	}
}

declare cla16 {
	instrin   do;
	input     a<16>,b<16>,ci,bi;
	output    out<16>;
  output    n,z,v,c;
	instr_arg do(a,b,ci,bi);
}

module cla16 {
	instrin   do;    
	input     a<16>,b<16>,ci,bi;
	output    out<16>;
  output    n,z,v,c;
	cla4      ad3,ad2,ad1,ad0;
	sel       c3,c7,c11,c14,c15;
	sel       gm0,gm1,gm2,gm3;
	sel       pm0,pm1,pm2,pm3;
    
	instruct do par{
		ad3.do(a<15:12>,b<15:12>,c11);    
		ad2.do(a<11:08>,b<11:08>,c7);
		ad1.do(a<07:04>,b<07:04>,c3);
		ad0.do(a<03:00>,b<03:00>,ci);

    out = ad3.out||ad2.out||ad1.out||ad0.out; 

		if (^bi) par {
      n = ad3.n;
			z = ad3.z & ad2.z & ad1.z & ad0.z;
			v = ad3.v @ c15;
			c = c15;
		}

		if ( bi) par {
			n = ad1.n;
			z = ad1.z & ad0.z;
			v = ad1.v @ c7;
			c = c7;
		}

		gm0 = ad0.gm;
		gm1 = ad1.gm;
		gm2 = ad2.gm;
		gm3 = ad3.gm;
		pm0 = ad0.pm;
		pm1 = ad1.pm;
		pm2 = ad2.pm;
		pm3 = ad3.pm;
	
		c3 = gm0|(pm0&ci);
		c7 = gm1|(pm1&gm0)|(pm1&pm0&ci);
		c11 = gm2|(pm2&gm1)|(pm2&pm1&gm0)|(pm2&pm1&pm0&ci);
		c15 = gm3|(pm3&gm2)|(pm3&pm2&gm1)|(pm3&pm2&pm1&gm0)
	         |(pm3&pm2&pm1&pm0&ci); 
	}
}