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Note 22.0                 MicroVAX I and II differences               No replies
FURILO::JACKSON                                     626 lines  19-AUG-1985 11:29
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      +---------------+                                    +-----------------+
      | d i g i t a l |                                    |  uNOTE # 022    |
      +---------------+                                    +-----------------+

                                                                         
      +----------------------------------------------------+-----------------+
      | Title: Differences between the MicroVAX I and the  | Date: 28-APR-85 |
      |                    MicroVAX II CPUs                |                 |
      +----------------------------------------------------+-----------------+
      | Originator: Mike Collins                           | Page 1 of 11    |
      +----------------------------------------------------+-----------------+


      This  MicroNote  identifies  the  differences  between  the  MicroVAX  I
      processor  and  the  MicroVAX  II processor.  The term 'MicroVAX 630' is
      sometimes used in this and other documentation when referring to the CPU
      module  of  the MicroVAX II system.  Table 1 below contains a summary of
      these differences and following the table are  detailed  discussions  of
      each.

      Table 1 - MicroVAX II versus the MicroVAX I

      +-----------------------------+--------------------+-------------------+
      |        FEATURE              |    MicroVAX II     |    MicroVAX I     |
      +-----------------------------+--------------------+-------------------+
      | CPU Technology              |   MicroVAX 78032   |    Custom VLSI    |
      +-----------------------------+--------------------+-------------------+
      | Memory System               |    Local Memory    | Uses Q-bus Memory |
      |                             |       System       |                   |
      +-----------------------------+--------------------+-------------------+
      | Floating Point              |   MicroVAX 78132   |     Microcode     |
      +-----------------------------+--------------------+-------------------+
      | Q-bus I/O Map               |        YES         |         NO        |
      +-----------------------------+--------------------+-------------------+
      | Addressable Physical Memory |     16 MBytes      |      4 MBytes     |
      +-----------------------------+--------------------+-------------------+
      | On-Board Memory             |    256KB or 1MB    |        None       |
      +-----------------------------+--------------------+-------------------+
      | Performance                 |         See Performance Section        |
      +-----------------------------+--------------------+-------------------+
      | Console Serial Line         |        YES         |        YES        |
      +-----------------------------+--------------------+-------------------+
      | Boot & Diagnostic ROMs      |        YES         |        YES        |
      +-----------------------------+--------------------+-------------------+
      | Form Factor                 |       1 Quad       |      2 Quads      |
      +-----------------------------+--------------------+-------------------+
      | Configuration Set via       |     Cabinet Kit    |   Cabinet Kit &   |
      |                             |                    | On-board Switches |
      +-----------------------------+--------------------+-------------------+
      | RQDX Controller Type        |        RQDX2       |   RQDX1 or RQDX2  |
      +-----------------------------+--------------------+-------------------+

                                                                Page 2


      Table 1 - MicroVAX II versus the MicroVAX I (cont'd)

      +-----------------------------+--------------------+-------------------+
      | TOY Clock w/ Battery Backup |        YES         |         NO        |
      +-----------------------------+--------------------+-------------------+
      | Multicomputing Hooks        |        YES         |         NO        |
      +-----------------------------+--------------------+-------------------+
      | Instruction Set Differences |            See MicroNote #24           |
      +-----------------------------+--------------------+-------------------+
      | Power Requirements          |   +5V - 6.2 Amps   |   +5V - 14 Amps   |
      |                             |  +12V - 0.14 Amps  |  +12V - 0.5 Amps  |
      +-----------------------------+--------------------+-------------------+
      | AC Loads                    |        2.7         |         2         |
      +-----------------------------+--------------------+-------------------+
      | DC Loads                    |         1          |         1         |
      +-----------------------------+--------------------+-------------------+
      | Termination                 |      240 Ohms      |      240 Ohms     |
      +----------------------------------------------------------------------+


      The MicroVAX II is both faster and smaller than  the  MicroVAX  I.   Two
      major   features   of   the   MicroVAX  II  are  responsible  for  these
      enhancements:  the MicroVAX 78032 microprocessor and the memory system.


                                   CPU TECHNOLOGY
                                   --------------
      The technologies used to design the two processors are different.   This
      is why the MicroVAX II CPU is half the size and three times the speed of
      the MicroVAX I.

      The MicroVAX I CPU was designed using a custom VLSI chip,  several  ROMs
      and off-the-shelf parts to implement the ALU, memory management unit and
      the microcode.  In contrast, these same features are implemented in  the
      MicroVAX 78032 microprocessor.  The MicroVAX 78032 is the first VAX on a
      chip.  Two custom gate arrays were also designed to reduce the  size  of
      the  MicroVAX II CPU to one quad module:  the Q-bus interface gate array
      and the MicroVAX 78032 interface gate array.


                                   MEMORY SYSTEM
                                   -------------
      The significant  difference  in  performance  is  due  in  part  to  the
      different  memory  systems  used by the two processors.  The MicroVAX II
      memory system uses a high speed interconnect between the MicroVAX  78032
      microprocessor  and  RAM.   The  MicroVAX I uses standard Q-bus memories
      which are not as fast but are also less expensive and usable by both the
      MicroVAX  I  and other 16-bit processors (such as the MicroPDP-11).  The
      MicroVAX I also uses a cache memory scheme.

      The  MicroVAX  II  CPU  communicates  to  memory  over  a  local  memory
      interconnect.   This  was done to increase the performance of the system
      in two ways.  First, the local memory system provides a fast  connection
      between  the  processor  and  memory  (400  nsec read and write cycles).
      Second, since memory fetches occur over the  local  memory  system,  the

                                                                Page 3


      Q-bus  is now a dedicated I/O bus.  The diagrams below contrast previous
      Q-bus processors and the MicroVAX II.

      The local memory system allows for 2 expansion memory boards.  (See next
      section on Addressable Physical Memory)

      Configuration Used by Previous Q-bus Processors:
      This approach is used by  most  Q-bus  processors  such  as  the  11/23,
      LSI-11/73  and  the  MicroVAX I.  In this design, the Q-bus bandwidth is
      shared by the processor and I/O devices when accessing memory.

              +---------+           +---------+           +---------+
              |         |           |         |           |         |
              |Processor|           | Memory  |           |   I/O   |
              |         |           |         |           |  Device |
              |         |           |         |           |         |
              |         |           |         |           |         |
              +---------+           +---------+           +---------+
                   |                     |                     |
                   |                     |                     |
             ---------------------------------------------------------
                                       Q-bus
             ---------------------------------------------------------
       
             Figure 1 - Memory Design Used by Previous Q-bus Processors


      MicroVAX II Design:
      The MicroVAX II uses a local memory system for  all  memory  references,
      allowing  the  Q-bus to be a dedicated I/O bus.  The local memory system
      is implemented using the  C-D  interconnect  of  the  backplane  and  an
      over-the-top  cable.  The memory system has a bandwidth of 10 MBytes/sec
      which will support the MicroVAX 78032  microprocessor  running  at  full
      speed  (approx.   6  MB/sec)  with simultaneous Q-bus DMA transfers (3.3
      MB/sec).

                     10 MBytes/sec
             +---------------------------+ <-- Over-the-Top Cable
             |     +---------------+     |
             |     |               | <---|---- C-D Interconnect in Backplane
           +---------+           +---------+           +---------+
           |         |           |         |           |         |
           |Processor|           |Expansion|           |   I/O   |
           |         |           |  Memory |           |  Device |
           | 6 MB/sec|           |(max. of |           |         |
           |         |           |    2)   |           |         |
           +---------+           +---------+           +---------+
                |                                           |
                |                                           |
           ---------------------------------------------------------
                             Q-bus (3.3 MBytes/sec)
           ---------------------------------------------------------
                         Q-bus is a dedicated I/O bus

                     Figure 2 - MicroVAX II Memory Design

                                                                Page 4


                                   FLOATING POINT
                                   --------------
      The MicroVAX architecture specifies that the floating point  instruction
      set  need  not  be  implemented in the hardware of a MicroVAX processor.
      For those processors that fall into this category, there is an  emulator
      in  the  software  which  guarantees  that  the  instructions  are still
      executable.  However the  MicroVAX  architecture  does  not  restrict  a
      MicroVAX  design  from having floating point instructions implemented in
      hardware.

      This is what was done on the MicroVAX I.  The MicroVAX I does  have  the
      F_floating  and D_floating or the F_floating and G_floating instructions
      in microcode.  (see MicroNote   21  "Floating  Point  Considerations  on
      MicroVAX I")

      The MicroVAX II uses the MicroVAX 78132 floating point unit to implement
      floating  point  instructions.  It is a high performance coprocessor for
      the MicroVAX 78032 and eliminates the  need  to  emulate  floating-point
      instructions in software.

      The MicroVAX 78132 handles the F_floating (single precision), D_floating
      (double-precision)  and the G_floating (extended range double-precision)
      floating point data types and instructions.  The  FPU  also  accelerates
      the execution of integer multiply and divide operations.

      The H_floating instructions are emulated in both the MicroVAX I and  the
      MicroVAX II.


                         Q-bus I/O MAP (SCATTER/GATHER MAP)
                         ----------------------------------
      The concept of a scatter/gather map has been used on  the  large  UNIBUS
      VAXes  since  the  VAX 11/780.  The same concept is used on the MicroVAX
      II.  Simply stated, the scatter/gather mechanism maps addresses from one
      bus  to  another  bus.   This  mapping  is necessary because the address
      length is not the same for the two buses.

      The term 'scatter/gather'  is  a  description  of  what  operations  are
      performed through the scatter/gather map.  A VAX with mapping enabled is
      a virtual machine and manages  data  in  512-byte  pages  which  may  be
      discontiguous  in  physical  memory.  When a DMA write operation occurs,
      pages of data may be 'scattered' into physical  memory.   During  a  DMA
      read operation from memory to an I/O device, such as a disk, these pages
      of data must be 'gathered' from throughout memory and transferred to the
      device.

      The MicroVAX I does not require a Q-bus I/O map.  Since all I/O  devices
      and  memory  share  the  same  bus,  the  Q-bus, there is no mismatch in
      address lengths and no I/O map is necessary.  Reading and  writing  data
      to  and  from memory in 512 byte pages becomes the responsibility of the
      I/O device or the system software.

      In the case of the MicroVAX II CPU, the scatter/gather map provides  the
      mapping  mechanism  to  allow  DMA  devices on the Q-bus, with a 4 MByte
      physical address range, to gain access to all  of  main  memory  on  the

                                                                Page 5


      local memory system, a 16 MByte physical address range.

      Figure 3 below illustrates the mapping process.

      The high order 13 bits of the Q-bus address select one of  8192  mapping
      registers.  Each register translates an address for a range covering one
      page of 512 bytes; thus the mapping registers  cover  the  entire  Q-bus
      address space of 4MB.

      The lower 15 bits of the mapping  register  will  have  been  previously
      loaded  with the correct information, which when appended to the lower 9
      bits of the Q-bus address selects the appropriate byte in main memory.

      The high order 15 bits of the physical address select which page in main
      memory  has the correct address and the low order 9 bits select the byte
      within a page.

                                   9 8        0
                        +----------------------+           Q-bus I/O Map
      Q-bus Address     | 13 bits   |          |           8K Mapping Registers
                        +----------------------+           +---------------+
                              |     |          |           |               |
                              +--------------------------> |---------------|
                                    |          |    +----- |               |
                                                    |      |---------------| 
                                    |          |    |      |               | 
      Selected Mapping Register                     |      |               |
                                    |          |    |      |               |
       31          15 14           0                |      |               |
      +-----------------------------+          |    |      +---------------+
      |V|            |    15 bits   | <-------------+
      +-----------------------------+
                     |              |          |

                     |              |          |
                                                              Local Memory 
                     |              |          |
                                                           +---------------+
      Physical Addr. +-------------------------+           |               |
      in local       |         24 bits         |           |               |
      memory         +-------------------------+           |               | 
                                  |                        |               |
                                  |                        |---------------|
                                  +----------------------> |               |
                                                           |---------------|
                                                           |               |
                                                           |               |
                                                           |               |
                                                           |               |
                                                           +---------------+

                 Figure 3 - Q-bus to Private Memory Mapping Process

                                                                Page 6


                            ADDRESSABLE PHYSICAL MEMORY
                            ---------------------------
      The total  amount  of  addressable  physical  memory  for  each  CPU  is
      different because of the memory system designs.

      The MicroVAX  I  uses  standard  Q-bus  memories  for  main  memory  and
      therefore  has  a  lower physical addressing limit than the MicroVAX II.
      This limit is constrained by the number of address lines on  the  Q-bus.
      There  are  22  address lines on the Q-bus, limiting maximum memory to 4
      MB.

      The MicroVAX II uses a 24 bit address when accessing  the  local  memory
      system.   Therefore  the  maximum  amount  of  addressable  memory is 16
      MBytes.

      When the system is first available, 9 Mbytes will be the maximum because
      the 16 MByte total depends on the availability of 1 Mbit RAM parts.  The
      9 MByte total includes a MicroVAX II CPU  (KA630-AA)  which  includes  1
      MByte on-board plus two 4 MByte expansion modules.

      The memory module capacities are listed in the table 3 below.

      Table 3 - Expansion Memory Options

      +----------+---------------+---------------+
      |  MEMORY  |  MEMORY SIZE  |  FORM FACTOR  |
      +----------+---------------+---------------+
      | MS630-AA |    1 Mbyte    |      Dual     |
      +----------+---------------+---------------+
      | MS630-BA |    2 Mbytes   |      Quad     |
      +----------+---------------+---------------+
      | MS630-BB |    4 Mbytes   |      Quad     |
      +----------+---------------+---------------+


                                    PERFORMANCE
                                    -----------
      The relative performance between the processors is of course application
      dependent.   However,  as  a  general rule of thumb, the MicroVAX II CPU
      will be approximately 3 times faster than the MicroVAX I.   The  results
      of  standard,  compute bound floating point benchmarks indicate that the
      MicroVAX II (with the MicroVAX 78132 FPU) will run 4 to 6.6 times faster
      than the MicroVAX I.


                                CONSOLE SERIAL LINE
                                -------------------
      The MicroVAX II and the MicroVAX I processors both  have  one  dedicated
      serial line for the console terminal.  There are two differences between
      the two serial line units.  First, the number of selectable  baud  rates
      is different.  The possible baud rates are listed in table 4.

                                                                Page 7


      Table 4 - Baud Rate Selections

      +--------------+------------+
      | MicroVAX II  | MicroVAX I |
      +--------------+------------+
      |      300     |     300    |
      |      600     |    1200    |
      |     1200     |    9600    |
      |     2400     |   19200    |
      |     4800     |            |
      |     9600     |            |
      |    19200     |            |
      |    38400     |            |
      +--------------+------------+

      Second, the console device connector on the patch panel for the MicroVAX
      I  is  an  RS232  25-pin D-subminiature connector.  The connector on the
      MicroVAX II patch panel is a 9-pin  D-subminiature  connector.   Because
      the  connectors  are different, different cables will be used to connect
      to the console terminal.
                                    FORM FACTOR
                                    -----------
      All of the features and functions  of  the  MicroVAX  II  processor  are
      contained  on  one  quad module.  The MicroVAX I processor is made up of
      two quad modules, a data path module ('DAP'), and  a  memory  controller
      ('MCT').   The  two  modules  of the MicroVAX I communicate over the C-D
      backplane interconnect and an over-the-top ribbon cable.


                              BOOT AND DIAGNOSTIC ROMs
                              ------------------------
      Both processors have boot/diagnostic ROMs.  The ROMs on the  MicroVAX  I
      are  NOT  the  same as those on the MicroVAX II CPU, therefore there are
      differences in their operation.

      Both ROMs perform the following functions :
           Initialize the machine into a known state.
           Perform diagnostic tests.
           Allow for the automatic restart or bootstrap of the system following 
           a processor halt or initial power-up.
           Provide bootstrap capability from a variety of devices.
           Provide the VAX console command language.

      Perform diagnostic tests.
      When either machine is powered on, their respective diagnostic tests are
      executed.

      Microverify is the  name  given  to  the  diagnostics  executed  by  the
      MicroVAX  I  system.  There are three LEDs on the DAP module and a seven
      segment display on the patch panel which will isolate the problem to one
      of  the  two CPU modules.  Error codes are defined in table 10-1 on page
      10-4 of the MicroVAX I Owner's Manual.

      A similar function is performed by the MicroVAX II CPU diagnostics.   As
      each  test  is run, a code is displayed on the processor LEDs, the patch

                                                                Page 8


      panel and the console terminal.  These codes count down  in  hexadecimal
      from  F  to  0.   There  are potentially 16 steps which may be executed,
      therefore the MicroVAX 630 has 4 LEDs.  The definitions for these  codes
      may  be  found  in  the  MicroVAX  630  CPU  Module  User's  Guide  (P/N
      CK-KA630-UG).

      Power-up modes.
      A major  difference  between  the  two  processors  is  what  occurs  at
      power-up.  The MicroVAX I will either attempt to do a restart, bootstrap
      or halt and enter console mode (the appropriate option is  selected  via
      two switches on the DAP module).

      The MicroVAX II can also be configured  to  try  a  restart,  perform  a
      bootstrap  or halt.  Before it attempts these options however, it does a
      language inquiry.  All console messages may be output in one  of  eleven
      different  languages;  one  must be selected.  There are options such as
      defaulting to English or defaulting to the language which  was  selected
      previously for unassisted bootstrap or always prompting for the language
      at power-up.  These options are described in the MicroVAX 630 CPU Module
      User's Guide.
      Bootstrap Devices.
      The list of devices which each  processor  can  boot  from  is  slightly
      different.  Table 5 lists the supported boot devices for each processor.
      The devices are listed in the order by which they are  searched  by  the
      processor.

      Table 5 - Bootstrap Devices

      +----------------+------------+
      |  MicroVAX II   | MicroVAX I |
      +----------------+------------+
      | RQDX, KDA50 or | RQDX       |
      | RC25           |            |
      |                |            |
      | TK50           |            |
      |                |            |
      | MRV11-D        | MRV11-D    |
      |                |            |
      | DEQNA          | DEQNA      |
      +----------------+------------+

      VAX Console Command Language.
      Both processors implement the VAX console command language in their boot
      ROMs.   Most  of  the  frequently  used commands are implemented by both
      machines.  However, there are a few commands which are only  implemented
      by one or the other.  Table 6 lists the commands and indicates which are
      available on each processor.

                                                                Page 9


      Table 6 - VAX Console Commands

      +-------------+--------------+------------+
      |   COMMAND   | MicroVAX II  | MicroVAX I |
      +-------------+--------------+------------+
      | BREAK       |       X      |      X     |
      | INITIALIZE  |       X      |      X     |
      | START       |       X      |      X     |
      | CONTINUE    |       X      |      X     |
      | HALT        |       X      |      X     |
      | BOOT        |       X      |      X     |
      | UNJAM       |       X      |      X     |
      | EXAMINE     |       X      |      X     |
      | DEPOSIT     |       X      |      X     |
      | X           |       X      |      X     |
      | FIND        |       X      |            |
      | REPEAT      |       X      |            |
      | TEST        |       X      |      X     |
      | ! (Comment) |       X      |            |
      | N (Next)    |              |      X     |
      | CTRL/U      |       X      |      X     |
      | CTRL/S      |       X      |            |
      | CTRL/Q      |       X      |            |
      | CTRL/O      |       X      |            |
      | CTRL/R      |       X      |            |
      | CTRL/C      |       X      |            |
      +-------------+--------------+------------+ 


                                   CONFIGURATION
                                   -------------
      Both CPUs  have  a  cabinet  kit  through  which  certain  features  are
      configured.   However  the  cabinet kits are different.  The cabinet kit
      for the MicroVAX I will not work with  the  MicroVAX  II  CPU  and  vice
      versa.

      In addition to the cabinet kit are eight switches on one of the MicroVAX
      I  CPU  boards  used  for setting such functions as the recovery action,
      break detect enable and the baud rate selection.  The  cabinet  kit  for
      the  MicroVAX  I is a set of two cables and a patch panel insert for FCC
      system integration.  It performs three functions:

           1. Console terminal connector 
           2. Baud rate rotary switch
           3. Two digit LED display

      The MicroVAX II CPU has no switches or jumpers  on  the  module  itself.
      All  options are set via the patch panel insert of the cabinet kit or an
      optional configuration card used in place of the cabinet kit.  The patch
      panel insert has the following functions :

           1. Halt enable switch
           2. Power-Up mode rotary switch
           3. Baud rate rotary switch
           4. Hexadecimal display

                                                               Page 10


           5. Console terminal connector
           6. Batteries for battery backup

      For MicroVAX II applications which do not need the cabinet kit,  Digital
      designed  a  special  configuration  card.  This card allows the user to
      configure the same functions as the cabinet kit but it is  much  smaller
      and requires no cables.  The configuration card is 1.5" x 2.5" and plugs
      into two connectors on the CPU module.  Simple DIP switches are used  to
      select the appropriate functions.


                       TIME-OF-YEAR CLOCK WITH BATTERY BACKUP
                       --------------------------------------
      The MicroVAX I does not have the capability for  keeping  time  after  a
      system  power-down  or  power  failure.  Each time the system is brought
      back up the time must be reentered  manually  (This  limitation  can  be
      bypassed  under  MicroVMS  for  example,  but  the  system  time will be
      incorrect until set at a later time).

      The MicroVAX II has the capability for a battery backed up  time-of-year
      (TOY)  clock.   A  low-power  TOY  clock  chip was designed onto the CPU
      module.  After a system power-down the chip keeps track of  the  correct
      time  and the system can reboot without needing an operator to enter the
      time and date.

      During normal operation the system keeps track of time using a  10  msec
      interval  timer internal to the MicroVAX 78032.  When power is lost this
      interval timer will stop  but  the  TOY  clock  chip  will  continue  to
      operate.  The TOY clock chip has a resolution of 1 second.

      The batteries for the time-of-year clock chip are located on  the  patch
      panel insert of the cabinet kit.

      The battery backup capability is not present if a system  is  using  the
      configuration  card instead of the cabinet kit in order to configure the
      system.  However there are pins on the configuration card which  can  be
      used  to  connect external batteries to provide the same capability.  It
      is the user's responsibility to provide the batteries  and  cabling  for
      battery backup when using the configuration card.


                                RQDX CONTROLLER TYPE
                                --------------------
      Initial MicroVAX I systems use the RQDX1 disk controller  for  the  RX50
      floppy  disks  and the RD51 / RD52 winchester disks.  This controller is
      required to be the last module in a system  because  it  does  not  pass
      interrupt acknowledge (IACK) nor the DMA grant (BDMG) signals to options
      which come after it in the backplane.

      The RQDX2 disk controller was designed to work with and is shipped  with
      initial  MicroVAX II systems.  The RQDX2 will also work with other Q-bus
      processors such as the MicroVAX I and MicroPDP-11/73.

      IMPORTANT!  The RQDX1 is incompatible with the MicroVAX II CPU therefore
      the two should never be configured into the same system.

                                                               Page 11


                                MULTICOMPUTING HOOKS
                                --------------------
      The MicroVAX II CPU has  been  designed  to  allow  a  maximum  of  four
      processors  to  coexist  in  the  same  system.  There will always be an
      arbiter and up to 3 auxiliaries.  This feature is NOT supported  by  any
      Digital  operating  system  and  is not an off-the-shelf multiprocessing
      solution.  For more information on the specifics of  the  multicomputing
      feature,  reference MicroNote #26 and the MicroVAX 630 CPU Module User's
      Guide.


                            INSTRUCTION SET DIFFERENCES
                            ---------------------------
      The  MicroVAX  architecture  specifies  which   instructions   must   be
      implemented  in the hardware/microcode, all other instructions will then
      be emulated in software.  Depending on the particular  instruction,  the
      emulation  is either entirely in software or in software with a hardware
      assist.  Any specific MicroVAX implementation  will  meet  this  minimum
      requirement but may choose to include in its microcode some instructions
      which would otherwise be emulated.  MicroNote #24 contains a table which
      lists  all of the instructions in the VAX architecture and indicates for
      each MicroVAX processor  whether  or  not  the  instruction  is  in  the
      hardware or emulated.


               POWER REQUIREMENTS, AC LOADS, DC LOADS AND TERMINATION
               ------------------------------------------------------
      Table  7  below  summarizes  the  pertinent  information  necessary   to
      configure one of these processors into a system.

      Since the MicroVAX II CPU is only one quad module it is  not  surprising
      that   the   amount  of  current  drawn  from  the  +5  volt  supply  is
      substantially less than that required by the MicroVAX I CPU.

      Table 7 - Specifications

      +---------------------+-------------+------------+
      |    SPECIFICATION    | MicroVAX II | MicroVAX I |
      +---------------------+-------------+------------+
      | Power Requirements  |             |            |
      |   +5 Volt (amps)    |     6.2     |    14.0    |
      |   +12 Volt (amps)   |     0.14    |     0.5    |
      +---------------------+-------------+------------+
      | AC loads            |     2.7     |      2     |
      +---------------------+-------------+------------+
      | DC loads            |     1.0     |      1     |
      +---------------------+-------------+------------+
      | Termination (ohms)  |     240     |     240    |
      +---------------------+-------------+------------+

