RTL Logic

[der Mouse]

>>> Wired-OR will work fine for open-collector output TTL.
>> Well, except you generally get wired-AND, because the open
>> collectors are generally NPN collectors with emitters to ground, not
>> PNP collectors with emitters to Vcc.
> That is twice you've tried to make this point.  If a signal is viewed
> as active low, then what is going on is logically wired-or.

Yes...but would you call (¼ of) a 7408 an OR gate if it happens to be
manipulating such signals?  That's the sense in which I say it's
wired-AND: the resulting signal is what you'd get from feeding the same
logic levels (except with pullups, or non-OC outputs) into the gate
usually called an AND gate.

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