RTL Logic

[Dwight K. Elvey]

Hi
 Most of these were designed such that a single
output pullup resistor didn't use all of the
sink of an output transistor. This means that
two outputs tied together and would not draw too much
current.
 DTL does the same thing and allows the wired AND.
 As I recall, with RTL, you only needed to apply
power to one device if they were inverters 
since there was no other active logic,
like flops.
Dwight


>From: "Steve Thatcher" <melamy at earthlink.net>
>
>I don't see how doing a wired-and is possible when RTL includes a pullup 
resistor on each output. You would get to a point where an individual output 
transistor would not be capable of sinking all the "low" current.
>
>You can get a basic idea of the logic families here...
>
>http://www.asic-world.com/digital/gates5.html
>
>best regards, Steve Thatcher
>
>
>-----Original Message-----
>From: "Dwight K. Elvey" <dwight.elvey at amd.com>
>Sent: Jan 7, 2005 12:22 PM
>To: cctalk at classiccmp.org
>Subject: RE: RTL Logic
>
>Oops!
> I forgot one thing. You can put several RTL outputs in
>parallel as a wired AND. You can't do that with the
>general CMOS or TTL. You'd need to look out for this.
> Does anyone have a source for DTL parts. There are
>a could I've been looking for.
>Dwight
>
>
>