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Note 39.0                KDJ11-A and KDJ11-B Differences              No replies
FURILO::GIORGETTI                                   292 lines   4-SEP-1985 15:55
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      +---------------+                                    +-----------------+
      | d i g i t a l |                                    |  uNOTE # 039    |
      +---------------+                                    +-----------------+

                                                                         
      +----------------------------------------------------+-----------------+
      | Title:  Differences between KDJ11-A and KDJ11-B    | Date: 8-Aug-85  |
      +----------------------------------------------------+-----------------+
      | Originator:  Peter Kent                            | Page 1 of 5     |
      +----------------------------------------------------+-----------------+


                                      Purpose

      The purpose of this MicroNote is to identify and discuss the differences
      between the KDJ11-A and KDJ11-B CPU modules.

      The table that follows lists the differences between  the  CPU  modules.
      Differences that require explanation follow the table and are marked *.

      +------------------------+------------------+---------------------+
      | FEATURE                |   KDJ11-A        |      KDJ11-B        |
      +------------------------+------------------+---------------------+
      | Cache *                |   Single tag     |      Dual tag       |
      +------------------------+------------------+---------------------+
      | PMI support *          |   No             |      Yes            |
      +------------------------+------------------+---------------------+
      | On-board bootstrap *   |   No             |      Yes            |
      | and diagnostic ROM     |                  |                     |
      +------------------------+------------------+---------------------+
      | Boot/diagnostics  *    |   No             |      Yes            |
      | control status reg.    |                  |                     |
      +------------------------+------------------+---------------------+
      | Boot page *            |   No             |      Yes            |
      | control register       |                  |                     |
      +------------------------+------------------+---------------------+
      | Boot configuration *   |   No             |      Yes            |
      | and display register   |                  |                     |
      +------------------------+------------------+---------------------+
      | Instruction implementation differences  *                       |
      +-----------------------------------------------------------------+ 
      | DCJ-11 speed/FPJ11 differences *                                |
      +-----------------------------------------------------------------+
      | Backplane compatibility  *                                      |
      +-----------------------------------------------------------------+
      | Maintenance register differences  *                             |
      +-----------------------------------------------------------------+
                                                             cont'd





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      The differences between the CPU modules.  cont'd:

      +------------------------+------------------+---------------------+
      | FEATURE                |   KDJ11-A        |      KDJ11-B        |
      +------------------------+------------------+---------------------+
      | Module I.D.            |   M8192          |      M8190          |
      +------------------------+------------------+---------------------+
      | Size                   |   Dual           |      Quad           |
      +------------------------+------------------+---------------------+
      | Power: 5 volt (12 Volt)|   4.5            |      5.5 (0.2)      |
      +------------------------+------------------+---------------------+
      | AC loading             |   3.4            |      2.3            |
      +------------------------+------------------+---------------------+
      | Console serial line    |   No             |      One            |
      +------------------------+------------------+---------------------+
                                       Cache

      For a full discussion of cache memory as used on the KJD11-A and KDJ11-B
      refer  to  MicroNote #9 and the KDJ11-A and KDJ11-B User's Guides.  Both
      CPU modules have a similar cache organization  using  a  nine  bit  tag.
      This nine bit field contains information that is compared to the address
      label, which is part of the physical address.  When the physical address
      is  generated, the address label is compared to the tag field.  If there
      is a match it can be considered a  hit  provided  that  there  is  entry
      validation  and  no  parity  errors.   The KDJ11-B has an additional tag
      store called the DMA tag.  The DMA tag is an identical copy of the cache
      tag  store  and is used to monitor the main memory DMA updates while the
      cache tag store monitors the DCJ11 requirements.  The  presence  of  the
      second  tag store - DMA tag - allows the J-11 microprocessor to continue
      processing after it has relinquished the system bus  to  a  DMA  device.
      When  the  DMA tag detects a hit (main memory location written to by the
      DMA device), the microprocessor stops and relinquishes the internal  bus
      to  the  cache controller to allow it to monitor further DMA activity on
      the bus.  The KDJ11-A,  however,  has  only  one  tag  store  and  stops
      processing as soon as it relinquishes the system bus to a DMA device.

                                    PMI support

      The PMI or Private Memory Interconnect is described  in  MicroNote  #30.
      The PMI consists of 14 unique signals which use the CD interconnect side
      of the backplane of certain Q-bus backplanes.  PMI is used only with the
      KDJ11-B  and  MSV11-J.   PMI  DATI and DATO bus transactions between the
      KDJ11-B and MSV11-J are more than twice as fast as those between non-PMI
      CPU  and  memory  configurations.   The  KDJ11-A  does  not  offer a PMI
      capability.

      The Unibus adaptor used with PDP11/84 systems enables the Unibus map  if
      a  particular  PMI  signal - PMAPE (Unibus map enable) - is asserted and
      disables the Unibus map when  PMAPE  is  negated.   The  memory  modules
      associated with PMI (MSV11-J) do not use this signal.  PMAPE is asserted
      if Memory Management Register 3, bit 05 is set, and negates this  signal

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                                                           uNOTE # 039
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      if  MMR3  is  clear.   If there are devices which require this signal to
      work, the KDJ11-A  will  not  and  cannot  (without  warranty  violating
      modifications) be made to issue this signal.

                            KDJ11-B boot/diagnostic ROM

      The are basically 3 parts to the  ROM  code.   The  first  part  is  the
      diagnostic  tests  which are run at power up or at the initiation of the
      operator.  These tests perform checks on  the  CPU  module,  the  memory
      module(s),  and  the Unibus adaptor for Unibus systems.  The second part
      of the ROM is the boot code.  The following devices can be  booted  from
      the  KDJ11-B:   RA80/81/60, RD51/52, RX50, RC25, RL01/02, RX01/02, TU58,
      RK05, TK25/50, TS05, TU81, DEQNA, DECnet DUV11, DECnet  DLV11-E,  DECnet
      and DLV11-F.  The boot code can also start programs stored in the EEPROM
      or programs stored in M9312 type boot ROMs located on the  KTJ11  Unibus
      adaptor  module.   The third part of the the code allows the storing and
      modification of parameters for the CPU,  the  Unibus  adaptor,  and  the
      system.   This  portion  of  the boot code also provides support for the
      EEPROM itself.  The user can also create (using a machine  code  editor)
      his own custom boot code and save this code in the EEPROM.

                   Boot and diagnostic controller status register

      The boot and diagnostic controller status register (BCSR) is  both  word
      and  byte  addressable.   The  BCSR  allows  the boot and diagnostic ROM
      programs to test battery backup and reboot status, to set parameters for
      the  PMG  (processor  mastership  grant)  counter and the line clock, to
      enable the console halt on break feature and to enter or exit from stand
      alone mode.

                             Boot page control register

      The page control register is a read/write register which  is  both  byte
      and  word  addressable.  The PCR high byte provides the most significant
      ROM address bits when the 16 bit ROM sockets are accessed by bus address
      1777300-17773776.   The  PCR  low byte provides the most significant ROM
      (or EEPROM) address bits when the 16  bit  or  8  bit  ROM  sockets  are
      accessed by addresses 17765000-17765776.

                         Configuration and display register

      The configuration and display register reflects the status of the  eight
      switches edge mounted at the top of the module.  It also allows boot and
      diagnostic programs to update the 8 bit LED display located at  the  top
      of the KDJ11-B module.

                            Instruction set differences

      Instructions  which  are  required  to  do   a   read-modify-write   are
      implemented  differently  on  the KDJ11-A and KDJ11-B.  There are only 3
      instructions  which  are  defined  by  the  PDP11  architecture  to   be
      uninterruptible  during  its  read-  modify-write.  They are the TSTSET,

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      WRTLCK,  and  ASRB  instructions.   The  KDJ11-A  will  implement  these
      read-modify-write  instructions differently than a KDJ11-B.  The KDJ11-A
      processor uses the AIO signal outputs of the J11 to determine whether it
      performs  either  a 1) DATIO cycle or 2) a DATI cycle followed by a DATO
      cycle.  The KDJ11-A will ONLY do a DATIO Q-bus cycle when it executes  a
      TSTSET,  WRTLCK or ASRB instruction.  Past implementations of the PDP-11
      architecture  have  also  implemented   other   instructions   doing   a
      read-modify-write  cycle  as  being  uniterruptable.   The BIS (Bit Set)
      instruction will be used as an example.  This instruction  requires  the
      CPU  to  READ  a word from memory, possibly MODIFY that word, then WRITE
      the word back to  memory.   A  KDJ11-B  uses  a  Q-bus  DATIO  cycle  to
      implement   this   instruction.    Therefore,  the  instruction  is  not
      interruptable between doing the READ and the WRITE.   When  it  executes
      other  instructions  which want to do a read-modify-write operation like
      the BIS instruction, it  will  use  two  separate  Q-bus  cycles.   This
      implementation  allows  for  an  interrupt  or DMA request to be granted
      between the DATI and the DATO (case 2 above).   There  are  third  party
      vendors  whose  equipment assume that a BIS instruction will use a DATIO
      bus cycle.  Those devices will work fine in a system with a KDJ11-B, but
      will  work  intermittently  in a system with a KDJ11-A because what they
      assume to be uninterruptible is  now  interruptible  and  affects  their
      on-board firmware.

                                 Speed and the FPA

      +----------+---------+--------+----------------+--------------+---------+
      |          |  15 MHz | 18 MHz | FPA compatible | FPA on board | system  |
      +----------+---------+--------+----------------+--------------+---------+
      | KDJ11-AA |   Yes   |   No   |     No         |    No        | Q18/Q22 |
      +----------+---------+--------+----------------+--------------+---------+
      | KDJ11-AB |   Yes   |   No   |     Yes        |    No        | Q18/Q22 |
      +----------+---------+--------+----------------+--------------+---------+
      | KDJ11-AC |   Yes   |   No   |     Yes        |    Yes       | Q18/Q22 |
      +----------+---------+--------+----------------+--------------+---------+
      | KDJ11-BB |   Yes   |   No   |     Yes        |    No        | 11/73   |
      +----------+---------+--------+----------------+--------------+---------+
      | KDJ11-BC |   Yes   |   No   |     No         |    No        | 11/73   |
      +----------+---------+--------+----------------+--------------+---------+
      | KDJ11-BF |   No    |   Yes  |     Yes        |    Yes       | 11/83   |
      +----------+---------+--------+----------------+--------------+---------+


                              Notes on the above table

      The 15 MHz or 18 MHz refers to the crystal frequency at which the DCJ-11
      will  run.   FPA means the FPJ11 floating point accelerator chip.  Refer
      to MicroNote #25 for more information on upgrading with the FPJ11.   The
      KDJ11-A  is  a  CPU module that is not sold as part of a package system.
      The reference to Q18/Q22 refers to the fact that the KDJ11-A can be used
      in  any 18 or 22 bit Q-bus backplane.  The notation 11/73 means that the
      indicated KDJ11-B CPUs are used with the MicroPDP-11/73 systems and  the
      indicated KDJ11-B CPU are used with the MicroPDP-11/83 system.

                                  382

                                                           uNOTE # 039
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                                     Backplanes

      The KDJ11-A CPU may be used in any Q18/Q22 slot.  The KDJ11-B,  being  a
      quad  module  must  be  accomodated in a backplane which has Q-bus in AB
      slots and the CD interconnect in the CD slots.  The  KDJ11-B  cannot  be
      used in a backplane (or that part of the backplane) where there is Q-bus
      in both AB and CD slots.

                          Maintenance register differences

      The maintenance register contains the following information in both  the
      KJD11-A  and  KDJ11-B:   POK  (power  ok),  power up mode selected, HALT
      status, Module ID, FPA available,  and  Boot  address.   The  module  ID
      number  is  a  4  bit code that differs between the KDJ11-A and KDJ11-B.
      The ID number for the KDJ11-A is 0001 and 0002 for the KDJ11-B.






































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