                                                                   




                          INTRODUCTION

     The Discus M26 is a complete mass storage subsystem which has 
three main components: a 14" winchester type hard disk drive with a 
formatted storage capacity of 26 million bytes, a universal power 
supply which provides the necessary DC voltages which power the 
drive, and a controller which establishes a data channel between the 
disk drive and any S-100 based computer.  

     The drive and power supply are housed in cabinet which has been 
designed for either table top or rack-mount operation.  The only 
extra hardware required to mount the drive in a standard 19" RETMA 
equipment rack is a pair of rack-mount slides which attach directly 
to the cabinet.

     The controller plugs into a slot of the mother board of an S-
100 system and is connected to the drive through a pair of flat 
cables.  One of the cables carries clock and data information and 
the other carries control and status information.  The controller 
can accomodate up to four drives so that the M26 system can be ex-
panded to a capacity of 104 million bytes.

     The Disk Operating System software supplied with the Discus M26 
system is the popular CP/M version 2.  It was chosen because of the 
ready availability of applications software that runs under CP/M.  
With CP/M, the owner of a Discus M26 disk system has access to 
virtually any software that has been written for a microcomputer 
based on the 8080/8085/Z-80 instruction set.
.he Introduction

     A user can commuciate with the Discus M26 system on any of 
three levels:  through CP/M, through low level software drivers 
which are also included on the disk, or through direct commands to 
the Disk Jockey Winchester controller.  The protocols for use of the 
system through CP/M are covered in detail by the CP/M manual 
furnished under separate cover.  The details of using the system 
through the low level software drivers and directly by the hardware 
are covered in this manual.
  
     A Winchester type sealed disk drive such as the one with the 
Discus M26 has many advantages and also some limitations.  Large 
capacity, low maintenance, and high reliability are perhaps the most 
obvious advantages.  The major disadvantage is the fixed nature of 
the magnetic media.  The media of a floppy disk drive can be removed 
and placed in a secure environment.  However this is not the case 
with the present generation of winchester disk drives.  The media is 
sealed inside the unit and cannot be removed.  Thus, so long as the 
drive is connected to a computer, the data written on the magnetic 
surface of the disk is never really secure.

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     The present solution to this data security problem is to backup 
the data periodically on some storage device which has removable 
media.  The most practical device for this job at the present time 
is a floppy disk system.  By using the facilities provided by CP/M, 
it is quite easy to transfer files from the Discus M26 drive to a 
floppy disk system such as, say, the Discus 2D or the Discus 2+2.  
In the near future it will be possible to backup data on a hard disk 
by using small high density cassette tape drives.  Presently the 
prices of these units are such that a backup system using them costs 
almost as much as the hard disk system itself.  However, several 
manufacturers are desiging low cost tape drives that will allow 
backup tape systems to sell for approximately half the price of a 
hard disk system - a much better state of affairs.  Morrow Designs/
Thinker Toys plans to introduce a cassette tape backup system later 
in 1980.
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.he                   THE SYSTEM BOOTSTRAP

INTRODUCTION

     The Disk Jockey/Winchester controller contains all the logic 
necessary to control the drive and to transfer data to and from the 
disk.  It appears to the system as four I/O devices and has no 
memory in the address space of the CPU.  Therefore some other ele-
ment of the system has the responsibility for the initial load of 
the operating system and/or utility software from the disk.  This 
initial loading operation is refered to as the bootstrap operation.  
The purpose of this section is to discuss several ways that the 
bootstrap operation can be implemented and to present a program 
that will perform a bootstrap.                                     


IMPLEMENTING THE BOOTSTRAP

     The code necessary to perform a bootstrap is roughly 100 bytes 
long.  The least expensive but most troublesome method to bring up 
the system is to enter this code into memory and execute it.  
Fortunately there are several alternatives to this process which 
Morrow's/Thinker Toys will supply at nominal cost:
     
     1.  The bootstrap code can be programmed into any of the more 
     common EPROMs:  1702, 5204, 2708, or 2716.  Any of these parts 
     are acceptable if supplied by the customer.  If the part is to 
     be supplied by Thinker Toys, it will be a 2708.  The starting 
     address of the program can be anywhere but must be supplied 
     along with the order.

     2.  The program can be supplied on a CP/M compatable floppy 
     diskette as a command file.  In this case the program has a 
     starting address of 100H (Hex) in accordance with the system 
     requirements of CP/M.

     3.  When CP/M 2.0 is supplied with a Discus I or Discus 2D 
     system, the CBIOS software of the CP/M contains a module which 
     knows that a Discus M26 system may be attached to the computer 
     and treats it as drives E, F, and G (drives A, B, C, and D are 
     reserved for floppys).


THE BOOTSTRAP SOFTWARE

     The program listed below will load the disk system software 
into memory.  There is an option which will either load CP/M or only 
the utility low lever disk drivers.  The program starts at location 
100H (Hex) but can be easily changed to start at the beginning of 
any page by altering the third byte of the jump (and conditional 
jump) instructions to the value of the desired page.   
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.he Bootstrap load program
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.he Bootstrap load program
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.he             SYSTEM INPUT/OUTPUT REQUIREMENTS

INTRODUCTION

     To do useful work, the operating system must communicate with 
at least one other I/O device besides the disk.  This device is 
called the SYSTEM CONSOLE and generally consists of a video display 
and a keyboard.  This device allows the user and the operating 
system to communicate with each other.  Depending on overall re-
quirements it may be necessary to attach to the system other I/O de-
vices such as  a printer or a modem.

     I/O devices vary greatly in their electrical and mechanical 
characteristics and, to communicate with them, allowances must be 
made for these variances.  However, in order that the operating sys-
tem be flexible, it must remain aloof to the peculiarities of the 
devices that it communicates with.  Thus, each time a new type of 
I/O device is connected to the system a communications problem is 
created. It is resolved by a software module called a "driver".  The 
driver must accept commands from the operating system and translate 
them into a form that the I/O device will accept.  Usually the I/O 
device is connected to the system through an interface which trans-
lates the computer's logical signals to the proper electrical 
signals that the device can understand.  Generally this interface is 
a circuit board that plugs into the bus of the computer and is con-
nected to the device through a cable. 

     In order to create a driver, the user needs to have detailed 
knowledge concerning (1) how information is passed back and forth 
between the device and the interface, (2) how the interface and the 
computer communicate, and (3) how the operating system passes in-
formation back and forth to the driver.

     Drivers vary a great deal in their length and complexity.  How-
ever irrespective of their size or intricacy, there is an important 
observation to be made about the creation of a driver:  someone who 
does not possess a clear and detailed understanding of how BOTH the 
device and its interface function should never attempt to write the 
software to drive it.  This type of task also presupposes consider-
able skill in assembly language programming.  Faulty or incomplete 
knoweldge of the device or its interface usually results in a pro-
gram that doesn't work or, worse yet, partly works.  A great deal of 
time can be wasted and sometimes equipment can be damaged in trying 
to make a bad driver function.  If there is any question in the 
user's mind about how a driver should be written, he should consult 
with the personnel at the computer store where the system was pur-
chased.  In many cases, the driver software will be a stock item and 
can usually be installed before the system leaves the store.  

     In many areas there are groups of computer enthusiasts who have 
joined together in clubs to share knowledge and exchange informat-
ion.  These organizations usually meet at regular intervals and pro-
vide an ideal environment to gain experience and sharpen skills in 
all areas of computing.  The user who wishes to learn the art of 
creating device drivers will benifit from joining one of these 
groups because of the wide range of skills that its members posses.

.he System I/O requirements
     This section of the manual discusses how information is passed 
back and forth between the operating system and the driver.  Also 
presented are several sample drivers for the system console which 
interface to some of the more common S-100 computers.

THE I/O DRIVER JUMP TABLE

     CP/M maintains a table of jump instructions in high memory.  
Each entry in this table points to an I/O driver that the operating 
system may have occasion to use.  There are 17 entries in this table 
but only 6 of these are of concern to the user since the others 
point to disk drivers.  The table, as it appears in memory, is pre-
sented below.  The entries marked with an asterisk are the ones of 
interest to the user and will be discussed in detail.

               JMP BOOT       ;arrive here from a cold start load
               JMP WBOOT      ;arrive here for warm start
              *JMP CONST      ;check for console character ready
              *JMP CONIN      ;read console character in
              *JMP CONOUT     ;write console character out
              *JMP LIST       ;write listing chatacter out
              *JMP PUNCH      ;write character to punch device
              *JMP READER     ;read the reader device
               JMP HOME       ;move to track 0 on selected disk
               JMP SELDSK     ;select disk drive
               JMP SETTRK     ;set track number
               JMP SETSEC     ;set sector number
               JMP SETDMA     ;set data transfer address
               JMP READ       ;read selected sector
               JMP WRITE      ;write selected sector
               JMP LISTST     ;return list status
               JMP SECTRAN    ;sector translate subroutine

     At location 0 in memory CP/M maintains a jump instruction to 
the second entry of this table - JMP TABLE+3.  Thus, the value in 
location 2 is the page number that the table starts on and the value 
in location 1 is three greater than the location within the page 
that the table starts at.  In almost all operating systems, the jump 
table starts at the beginning of a page which means that the value 
of location will usually be 3.

     The DISCUS M26 disk system is shipped with two types of I/O 
configurations: 
                    1. Preinstalled drivers which interface to
                         a. DISCUS  floppy disk controller
                         b. SWITCHBOARD I/O controller board
                         c. SOL computer
                         d. EXIDY computer
                         e. HORIZON computer
                    
                    2.  No  installed drivers - each entry in the 
                        table marked with an asterisk is a  "jump 
                        to self" instruction
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INSTALLING I/O DRIVERS

     In systems which have no installed drivers, there is a 512 byte 
section of memory immediately following the jump table which is re-
served for the drivers which the user needs to furnish.  In some 
instances it may not be necessary to install all six of the dirvers 
listed above.  For instance, if there is no punch in the system, the 
punch driver would then consist of a single RET(urn) instruction.  
The following procedure should be used to install the necessary 
drivers:

          1. Study carefully the CP/M 2.0 Alteration Guide
             section of the CP/M documentation manual.

          2. Code and assemble the drivers one by one.

          3. Enter the assembled code into the reserved 512 byte
             memory area immediately following the jump table.

          4. Alter the "jump to self" instructions so as to point 
             to the newly installed drivers.

          5. Test and debug the drivers.

          6. When a driver functions correctly execute the 
             SAVEUSER command.  This command automatically alters
             the operating system so that the driver is loaded 
             back into memory whenever the system boots.

          7. Save a copy of the source code of the drivers on a 
             file of the disk so that if and when the operating
             system is made larger (or smaller) the drivers can
             be reinstalled with a minumum of effort.


I/O DRIVER SPECIFICATIONS

     All simple character I/O operations are assumed to be performed 
in ASCII, upper and lower case, with high order (parity bit) set to 
zero.  An end-of-file condition for an input device is givin by an 
ASCII control-z (1A hex).  Peripheral devices are seen by CP/M as 
"logical" devices, and are assigned to physical devices within the 
BDIOS (see the CP/M documentation).

     In order to operate, the system needs only the CONST, CONIN, 
and CONOUT drivers (LIST, PUNCH, and READER may be used by PIP, but 
not by BDIOS).  Futher, the LISTST entry is used currently only by 
DESPOOL, and thus, may be a simple RET instruction as a first pass.

                             DEVICES

CONSOLE   The principal interactive console which communicates with 
          the operator, accessed through CONST, CONIN, and CONOUT.  
          Typically, the CONSOLE is a device such as a CRT or Tele-
          type.
.he System I/O requirements - Driver Specifications
LIST      The principal listing device, if it is connected to the 
          system, which is usually a hard-copy device such as a 
          printer or Teletype.

PUNCH     The principal tape reading device, such as an optical 
          reader or Teletype.

               Note that a single peripheral can be assigned as the 
          LIST, PUNCH, and READER device simultaneously.  If no 
          peripheral device is assigned as the LIST, PUNCH, or 
          READER device, the driver that the user creates may give 
          an appropriate error message so that the system does not 
          "hang" if the device is accessed by PIP or some other user 
          program.  Alternately, the PUNCH and LIST drivers can just 
          simply return, and the READER driver can return with a 1A 
          (hex) in register A to indicate an immediate end-of-file.

                             DRIVERS

CONST     Sample the status of the currently assigned console device 
          and return 0FFH in register A if a character is ready to 
          read, and 00H in register A if no console characters are 
          ready.

CONIN     Read the next console character into register A, and set 
          the parity bit (high order bit) to zero.  If no console 
          character is ready, wait until a character is typed before 
          returning.

CONOUT    Send the character from register C in the console output 
          device.  The character is in ASCII, with high order parity 
          bit set to zero.  You may want to include a time-out on a 
          line feed or carriage return if your console device re-
          quires some time interval at the end of the line (such as 
          a TI Silent 700 terminal).  You can, if you wish, filter 
          out control characters which cause your console device to 
          react in a strange way (a control-z causes the Lear 
          Seigler terminal to clear the screen, for example).

LIST      Send the character from register C to the currently as-
          signed listing device.  The character is in ASCII with 
          zero parity.

PUNCH     Send the character from register C to the currently as-
          signed punch device.  The character is in ASCII with zero 
          parity.

READER    Read the next character from the currently assigned reader 
          device into register A with zero parity (high order bit 
          must be zero), and end-of-file condition is reported by 
          returning an ASCII control-z (1AH).
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.he System I/O Requirements - Disk Jockey I/O Drivers
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.he System I/O Requirements - SOL I/O Drivers
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.he System I/O Requirements - EXIDY I/O Drivers
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.he System I/O Requirements - HORIZON I/O Drivers
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.he                PROGRAMMING SPECIFICATIONS
INTRODUCTION

     There are applications which require a more intimate degree of 
control over the disk than is possible through the operating system.  
On the other hand, it may not be desirable or necessary to communi-
cate directly with the controller through its hardware registers.  A 
set of low-level software drivers are included with the system to 
meet the foregoing needs.  These drivers can be loaded directly from 
the system tracks through an option in the bootstrap loader.  The 
source code has also been provided in a file called LLDRIVER.ASM.  
This file can be accessed through the operating system should the 
user need to modify it.  The code has been assembled to run starting 
at 370:000 Octal (0F800 Hex).  A change in the "origin" statement of 
the file will allow the code to be assembled for other starting 
address.
.he Programming Specifications

THE DISPATCH JUMP TABLE

     To use the low-level drivers, the user should branch to the 
appropriate address in a jump table in the first few words of the 
driver software.  Since each subroutine ends with a RET(urn) in-
strucion a CALL instruction should be used to branch to it. 

     The jump table contains jump instructions that point to the 
true address of a utility routine within the software.  Having a 
jump table allows the individual routines to be updated and moved 
without having to change software that calls the routines.  Let A 
represent the address of word 0 of the driver software.  In the 
standard version, A = 370:000Q (F800H).  The addresses to call for 
the utility routines are then:

ADDRESS  STANDARD VALUE  SYMBOLIC  FUNCTION
                         VALUE
          Octal   Hex   
  A      370:000  F800   TRKZRO    Recalibrate (seek to track 0)
  A+3    370:003  F803   TRKSET    Seek to a track
  A+6    370:006  F806   SETSEC    Select a sector
  A+9    370:011  F809   SETDMA    Set the data transfer address
  A+12   370:014  F80C   DREAD     Read a sector of disk data
  A+15   370:017  F80F   DWRITE    Write a sector of disk data
  A+18   370:022  F812   SELDRV    Select a disk drive
  A+21   370:025  F815   DMAST     Read data transfer address
  A+24   370:030  F818   STATUS    Disk status input
  A+27   370:033  F81B   STHEAD    Select a read/write head
  A+30   370:036  F81E   SETKEY    Set the "key" for a sector

     The specific function of each subroutine is described below.

     A subroutine completes by executing a RET instruction.  If the 
routine completes normally, it returns with the carry flag cleared.  
If an error is detected, the carry flag is set.  A map of the error 
conditions is placed in the CPU's A register.  A program should al-
ways test the carry flag after a return from a disk utility subrou-
tine and branch to an appropriate error handling routine if the 
carry flag is set.
DISK I/O

     To understand the significance of the disk utility software, it 
is necessary to say a few words about how data is organized in the 
disk.
     
     Information on the disk is organized into 202 concentric 
tracks.  The disk read/write heads can be moved to any track by a 
series of step in or step out commands.  A step in command moves the 
read/write heads one track towards the center of the disk.  A step 
out commnad moves the heads one track away from the center of the 
disk.  The numbering of the tracks is arranged so that track zero is 
the farthest from the center of the disk.  

     There are two rotating platters inside the drive and both the 
upper and lower sides of the platter are used to store magnetic in-
formation  Floating over each surface are a pair of read/write heads 
mounted side by side and spaced so that when the outer head is 
positioned over its inner most track, it is still farther away from 
the center of the platter than the inner head is when positioned 
over its outer most track.  That is, track zero for the inside head 
is closer to the center of the platter than track 201 is for the 
outside head.  There are a total of eight heads on the drive - two 
for each surface.

     Once the read/write heads have been moved to the desired track, 
the rotation of the disk will move a circle of magnetic material 
beneath (or above) each of the eight heads.  Within these eight 
circles data is recorded in distinct regions called sectors.  The 
sector is the smallest amount of information that can be separately 
read from or written to the disk and each one contains 512 bytes of 
data.

     In the header field which preceeds the data field of a sector, 
the track number, the head number, the sector number, and data 
security information are recorded.  During read or write commands, 
this header is read before data transfers take place.  

     The disk drive has a sensor that reports when the read/write 
heads are physically positioned at track zero.  A series of step out 
commands must be issued by the controller until this status line be-
comes active.  This operation will always position the head to the 
same physical track.  The seek to track zero command is often called 
a recalibrate command and is a standard utility subroutine supplied 
with the disk software.  Whenever the heads are moved to another 
track, the disk drivers must account for this change in position so 
that when read or write commnads are issued, correct track infor-
mation is passed to the controller.

     Transfering a sector of disk data between memory and the disk 
therefore involves the following steps, each corresponding to a sub-
routine call to the disk utility sorfware (with the exception of 
error checking).


     1. Specify the track number the read/write heads should be 
        positioned over during subsequent data transfers between the 
        disk and memory.  There are a total of 202 tracks, numbered 
        0 through 201.

     2. Check for error conditions.

     3. Specify a head to be selected during subsequent read or
        write operations.  There are a total of eight and are
        numbered 0 through 7.

     4. Specify a sector number that will be involved in subsequent 
        data transfers between the disk and memory.  There are a 
        total of 32 sectors numbered 1 through 32.

     5. Check for error conditions.

     6. Specify the starting memory address of the block of data 
        that is to be transfered to or from the disk.

     7. Perform the read or write operation.

     8. Check for errors.


DISK UTILITY SUBROUTINES
.he Programming Specifications - Utility Subroutines

         
TRKZRO - This subroutine positions the read/write heads to the 
         outer-most track of the disk platters: track 00.  The track 
         zero sensor is used to determine this positioning.  Except 
         for track 00, the drive has no way to know where the read/ 
         write heads are positioned.  It is one of the responsib-
         ilities of the disk utility software to always know over 
         what track the heads are positioned. In general, when a 
         drive is first selected, the track position of the heads is 
         not known. Thus, the TRKZRO routine should be called.  In 
         fact, if there is ever any doubt about the position of the 
         heads this routine should be called.


TRKSET - This routine will issue the proper commands to the drive to 
         position the read/write heads over the track which is spec-
         ified by the CPU's C register.  The value in the C register
         should be between 0 and 201 (decimal).  A value outside of 
         these bounds will cause the routine to abort with the carry 
         flag set and bit 6 of the A register set.  A test is per-
         formed to make sure that the controller is not busy 
         processing a data transfer command.  Also, the status of 
         the most recently selected drive is tested.    If the con-
         troller is busy, or if the drive is not ready, the carry 
         bit is set and the routine aborts.  As before, the A reg-
         ister will indicate the type of error that was encountered: 
         if bit 1 is set, the controller was busy.  If bit 5 is set, 
         the drive was not ready.  If there are no error conditions, 
         the routine issues a series of step pulses to the drive so 
         as to move the read/write heads to the proper track.  This 
         series of step commands is issued much faster than the 
         heads can move.  This does not pose a problem however, 
         since the drive has the ability to buffer and collect 
         pulses that arrive too rapidly.  This ability enhances the 
         performance of a multiple drive system:  after a series of 
         step commands are issued, it is possible to deselect the 
         drive and select another.  In this way, one drive can be 
         moving its heads to a new track while another is transfer-
         ing data.  This type of operation is called overlapped 
         seek.  The logic of the TRKSET routine has been designed to 
         allow as many overlapped seeks to occur as is practical.  
         Moveover, care has been taken so that the waits encountered 
         for head settle times are shared whenever possible.


SETSEC - This routine allows the user to specify what sector will be 
         involved in the next data transfer operation between the 
         disk and memory.  The sector number is passed by the C reg-
         ister of the CPU.  It should be between 1 and 32 (decimal).  
         If the value in C is outside these bounds, the carry flag 
         is set and the routine aborts.


SETDMA - During disk transfer operations, blocks of data move to and 
         from the disk.  These blocks are 512 bytes long.  The 
         starting address (in memory) of a data block that will be 
         involved in the next disk transfer operation is specified 
         by the contents of the B-C register pair when the SETDMA 
         routine is called.  The high order byte of the address is 
         in the B register and the low order byte is in the C reg-
         ister.  This routine cannout produce an error.


DREAD  - This subroutine transfers information from the disk to 
         memory.  If the controller is busy or if the drive is not 
         ready, the routine aborts with the carry flag set.  Error 
         information is detailed below.  The drive involved in the 
         operation is one specified by the most recent call to the 
         SELDVR routine (see below).  The position of the read/write 
         heads is determined by the latest call to the TRKSET rou-
         tine which involved the presently selected drive.  The head 
         number and sector number is given by the most recent calls 
         of the STHEAD routine (see below) and SETSEC routine re-
         spectively.  The starting memory address where the transfer 
         will occur is specified by the most recent call to the 
         SETDMA routine.  If the drive is ready and the controller 
         is not busy, DREAD issues a series of commands to the con-
         troller which will cause it to transfer information from 
         the  proper sector of the disk to its internal buffer.  If 
         any errors have occured, the carry flag is set and the rou-
         tine aborts without transfering data from the controller to 
         memory.  If the transfer is free of errors, the data is 
         moved from the controller's buffer into memory starting at 
         the address specified the latest call to SETDMA.

                      "DREAD" REGISTER A ERROR BITS

                      7   6   5   4   3   2   1   0
                              |       |       |   |
                  NOT READY___|       |       |   |___CRC ERROR
           RECORD NOT FOUND___________|       |_______BUSY

         The "RECORD NOT FOUND" bit indicates that the external 
         software has not selected the proper key to access the 
         sector in question.  If the "RECORD NOT FOUND" bit is set, 
         the "CRC ERROR" bit should also be set.  On rare occasions, 
         error bits 0 and 3 will indicate that the header of the 
         sector contains bad data or that a flaw exists in the mag-
         netic media at this area of the sector.  The bad data can 
         be corrected or the media flaw can be detected through the 
         use of diagnostic software covered in the next section of 
         this manual.  If CRC ERROR is 1 and the others bits are 0, 
         an error was made in reading the data in the "data" area of 
         the sector.  When data is written to the disk, a binary 
         polynominal is created from the serial stream as it is 
         transfered to the disk.  This polynominal is divided by a 
         fixed prime polynominal of order 16 until a remainder of 
         less than 16 is produced.  The data bits of this remainder 
         are appended to the end of the data field.  When a sector 
         is read back from the disk, the same polynominal is re-
         created by the serial stream except that the remainder 
         polynominal at the end is appended to the stream.  Thus 
         when the original prime polynominal is now divided into the 
         new one, there will be a zero remainder if there have been 
         no read errors.  If there were read errors, the division 
         will usually produce a remainder.  If this remainder is 
         non-zero, the CRC error bit in the A register is set.  The 
         hardware in the controller which implements the CRC logic 
         may not, at first glance, appear to function as described 
         above.  The hardware takes advantage of the fact that the 
         division can be done while the polynominal is being 
         created.  Normally, when the hardware detects a CRC error, 
         the calling software will try to re-read the data.  After 
         10 trys if the data is still bad, a hard error is reported.  
         In this case, diagnostic software should be used to test 
         the integrity of the magnetic media in this sector and 
         place it in the bad sector file if necessary.


DWRITE - This subroutine transfers information from memory to the 
         disk.  If the controller is busy or if the drive is not 
         ready, the routine aborts with the carry flag set.  A map 
         of the error bits is presented below.  The drive involved 
         in the operation is the one specified by the most recent 
         call to the SELDRV routine (see below).  The position of 
         the read/write heads is determined by the latest call to 
         the TRKSET routine which involved the presently selected 
         drive.  The head and sector number is givin by the most 
         recent calls to the STHEAD (see below) and SETSEC routines 
         respectively.  The starting memory address where the trans-
         fer will occur is specified by the most recent call to the 
         SETDMA routine.  If the drive is ready and the controller 
         is not busy, a block of data 512 bytes long is transfered 
         to the controller's buffer from memory.  DWRITE then issues 
         a series of commands to the controller which causes it to 
         write the data in its buffer to the proper sector on the 
         disk.  If any errors have occured, the carry flag is set 
         and the A register is loaded with the proper error bits.  
         These are detailed below.

                     "DWRITE"  REGISTER A ERROR BITS

                      7   6   5   4   3   2   1   0
                              |   |   |       |   |
                  NOT READY___|   |   |       |   |___CRC ERROR
           RECORD NOT FOUND_______|   |       |_______BUSY
                WRITE FAULT___________|

         For disk write operations, the "CRC ERROR" and "RECORD NOT 
         FOUND" bits should always be set together.  This type of 
         error condition is discussed above in the DREAD routine.  
         The "WRITE FAULT" bit is an indication of an exceptional 
         condition at the drive during a the time the WRITE GATE 
         signal is active.  For details, see the drive manual that 
         is included in the documentation.  This bit should never be 
         set if all the hardware is functioning correctly and there 
         are no faults in the cables which connect the controller to 
         the drive(s).


SELDRV - The value of the C register determines which one of four 
         drives is to be selected.  Only the two low order bits of 
         register C are used for drive selection.  The routine tests 
         the "drive ready" status and delays approximately 2 minutes 
         if the drive has not been selected before.  The reason for 
         this long wait is that it may take this long for the drive 
         to stabilize when power is initially applied.  If the drive 
         is not ready, the routine returns with the carry flag set.


STATUS - The controller has two status registers.  One is a full 8 
         bits wide while the other is only 2 bits wide.  This rou-
         tine reads the first status byte into the A register and 
         the two bits of the second status register into the B reg-
         ister.  The meaning of the various bits is detailed below.

.cp 8
                          THE A STATUS REGISTER

                     7   6   5   4   3   2   1   0
                     |   |   |   |   |   |   |   |
              HALT___|   |   |   |   |   |   |   |___TRACK 0
             INDEX_______|   |   |   |   |   |_______OP DONE
             READY___________|   |   |   |___________COMPLETE
       WRITE FAULT_______________|   |_______________TIME OUT


                          THE B STATUS REGISTER

                     7   6   5   4   3   2   1   0
                                             |   |___SEEK DONE
                                             |_______RETRY


         HALT - When this bit is a 1, the controller is halted and 
         not presently executing a command.  When this bit is a 
         zero, the controller is either preparing to execute a com-
         mand or in the process of executing a command.

         INDEX - The level of this bit changes whenever an index 
         pulse is transmitted from the presently selected drive.

         READY - When this bit is a 1, the presently selected drive 
         is "ready" and can respond to commands from the controller.  
         When this bit is a 0, the drive is not ready and will not 
         respond to controller commands.

         WRITE FAULT - When this bit is a 1, it indicates that there 
         was an exceptional condition present the last time that the 
         WRITE GATE signal to the drive was active.  An example of 
         an exceptional condition is that both READ GATE and WRITE 
         GATE are active at the same time.  It is possible that 
         WRITE FAULT will be active when power is first applied to 
         the drive.  However, DRVSEL will always reset WRITE FAULT 
         when the drive is initially selected.  This bit indicates 
         that there is a hardware fault of some kind; either in the 
         drive, the controller, or even the connecting cables.  
         Normally, this bit will be a 0.

         TIME OUT - This bit is set to a 1 whenever a command the 
         controller is executing takes longer than 8 revolutions of 
         the disk.  When the controller starts to execute a command, 
         a counter is enabled which is clocked by index pulses from 
         the drive.  If the command should still be in progress 
         after 8 revolutions, the TIME OUT bit is set and the com-
         mand in progress is terminated.  If this bit is set after a 
         transfer operation, it usually is an indication that the 
         "key" field in the sector header on the disk does not match 
         the key that the disk drivers have been given.  When this 
         bit is set, the RETRY bit in the B register should also be 
         set.  Normally, the "key" field of the sector header has a 
         zero value.  Also, for the disk utility software discussed 
         in this section of the manual the default value for the key 
         is zero.  Thus, unless a call was made to a special routine 
         to change the key, the TIME OUT bit should always be zero.  
         The one exception to this rule is when there is a hard data 
         error in the header field of the sector.  Usually this will 
         mean there is a flaw in the magnetic media and this sector 
         should added to the BAD SECTOR file.

.cp 4
         COMPLETE - When this bit is a 0, there is a drive in the 
         system which has received one or more step commands and is 
         in the process of moving its heads from one track to 
         another.  A drive does not have to be selected to affect 
         this bit.  When this bit is a 1, all the drives in the 
         system have completed their seeks.

         OP DONE - When this bit is a 1, it indicates that the 
         controller had completed some kind of transfer command.  
         Unlike HALT, this bit will be reset whenever a command is 
         issued to the controller - even a NOP command.  Once reset, 
         it will remain 0 until another transfer operation is 
         completed.

         RETRY - When the retry bit is set, a CRC error of some kind 
         was made during the most recent transfer operation from the 
         disk to the controller.  If the CRC error was in the header 
         area of the sector, the TIME OUT bit will also be set.  If 
         the error was in the data area of the sector, the TIME OUT 
         bit will be zero.  Once set, this bit will remain set until 
         a transfer operation occurs in which there is not a CRC 
         error.

         SEEK DONE - This bit is set whenever the COMPLETE bit makes 
         a transition from zero to one.  As with OP DONE, it is 
         reset by any command to the controller.


STHEAD - This routine selects one of eight read/write heads. The 
         least significant three bits of the C register determine 
         which head will be selected.  The heads are numbered 0 to 
         7.  Once a head is selected it will remain selected, even 
         if a different drive is selected.  No errors are be 
         reported by this routine.


SETKEY - This routine is used to pass a new sector access key to the 
         disk utility software.  There are six bytes in the header 
         field of a sector.  These are detailed below:

       _________________________________________________________
      |        |         |          |       |         |         |
      |  HEAD  |  TRACK  |  SECTOR  |  KEY  |  CRCHI  |  CRCLO  |
      |________|_________|__________|_______|_________|_________|

         When the controller is issued a read or write command, it 
         scans sector headers until it finds the correct one.  How-
         ever, it demands more than just the correct sector number.  
         The number of the selected head must agree with the value 
         of the first byte of the header field.  The track number 
         that the heads are positioned over must agree with the 
         value of the second byte of the header field.  Also, the 
         value of the fourth byte of the header field must be a zero 
         or must agree with the what was passed in the C register 
         during the most recent call to the SETKEY routine.  
         Finally, the value of the two CRC error detection bytes 
         must produce a zero remainder for the controller hardware.  
         When all these requirements are satisfied, the controller 
         will proceed to transfer a sector of data to or from the 
         disk.  Thus, the "key" field of the sector header allows 
         for 256 levels of security for a sector of data.  Except on 
         track 0, this "key" field is normally a zero.  However, by 
         using the software described in the next section, this 
         field can be altered and even read.  The purpose of the 
         SETKEY routine is to allow a user access to those sectors 
         to which he has a key that is different from zero.
.pa
.he                    DIAGNOSTIC SOFTWARE
INTRODUCTION

     This section describes five diagnostic utilities:  FORMAT, 
KREAD, KWRITE, THEADR, and TSECTOR.  These programs are stored on 
the system tracks of the disk and are all assembled to start at 
location 360:000Q (F000H).  The low level drivers described in the 
previous section are used by these diagnostic routines and must be 
loaded before calling any of these programs.


.he Diagnostic Software
FORMAT      

     The low order two bits of the C register specify which drive is 
to be formated.  If the drive is not ready or if the controller is 
busy, the carry flag is set and the routine aborts.  The error con-
ditions are reported in the A register.  Bit 1 is set if the con-
troller was busy and bit 5 is set if the drive was not ready.

     The purpose of this routine is to initialize all the sector 
headers on the disk.  There are 6 bytes in a header:  
          
          Byte 1:  Head number (between 0 and 7)
             
          Byte 2:  Track number (between 0 and 201)

          Byte 3:  Sector number (between 1 and 32)

          Byte 4:  Key

          Byte 5:  CRC error check sum low byte
          
          Byte 6:  CRC error check sum high byte

     The value of the key byte varies depending upon what track the 
heads are over.  The value of the key byte is: 200Q (80H) for track 
0; 0 for tracks 1 through 186; and 200Q (80H) for tracks 187 through 
201.  

     Track 0 and tracks 186 through 201 are considered system tracks 
while the other 186 tracks are divided up into 3 logical disks each 
one having 62 tracks.  Thus each logical disk within the drive has a 
capicity of 8,126,464 bytes.

     It is important to note that this program does NOT alter the 
data in any sector - only the header.  Also, at the end of the list-
ing there are two skew tables.  The first table dictates what order 
the sectors will be numbered on the system tracks while the second 
determines the order on the main data tracks.  The user may find 
that, for a particular application, it is desirable to alter the 
second table to increase throughput.  However, the first table 
should not be altered as the utility software must know the location 
of various modules on the system tracks.


.cp 4
KREAD

     This routine allows the user to read the "key" byte of a sector 
header.  The drive, track, and head in question must have been set 
by previous calls to the low level disk drivers.  The sector number 
is furnished in the C register and must be between 1 and 32.  If the 
routine returns with the carry flag set, it has encountered at least 
one of four possible errors which are reported in the A register:

          a.  Bit 1 set  -  Controller busy

          b.  Bit 5 set  -  Drive not ready

          c.  Bit 6 set  -  C register is out of range

          d.  Bit 7 set  -  Bad data in the sector header

     If no errors are encountered, the value of the "key" byte of 
the specified sector is returned in the A register and the carry 
flag is cleared.


KWRITE

     This routine allows the user to alter the "key" of a sector 
header.  The sector number is specified in the C register and the 
new value for the key is furnished in the B register.  If an error 
is encountered, the carry flag is set and the routine aborts with no 
change in the value of the key in the sector.  The error conditions 
and the error bits are exactly the same as those reported in the 
KREAD routine.  Also, the user has the responsibility to position 
the heads, select the drive, and to select the proper head before 
KWRITE is called.

     Extreme caution should be exercised in using this routine.  If 
the heads should happen to be positioned over a system track, it is 
possible that some of the system software will not run if the wrong 
key value were to be written on a system sector.


THEADR

     This program tests the header area of a sector.  The calling 
program has the responsibility of positioning the heads, selecting 
the drive, and selecting the head.  The desired sector is specified 
by the value in the C register.  If the test completes successfully, 
the program returns with the carry flag cleared.  If the carry flag 
is set, THEADR encountered an error.  The pattern in the A register 
informs the calling program what kind of error caused the return.  
The error pattern of the A register is presented below:

          a.  Bit 1 set  -  Controller busy.

          b.  Bit 5 set  -  Drive not ready.

          c.  Bit 6 set  -  C did not have a value between 1 and 32.

          d.  Bit 7 set  -  Data error in the sector header.
                                                                   
     If THEADR returns with bit 7 set when the carry flag is set, 
the H-L register pair will point to an eight byte buffer.  The first 
half of the buffer contains a pattern that was last written to the 
disk.  The second half contains the pattern that was last read.  If 
the two patterns are identical, a hard CRC error was encountered.


TSECTOR

     This program test the data area of a sector.  The calling 
program has the responsibility of positioning the heads, selecting 
the drive, and selecting the head.  The desired sector is specified 
by the value in the C register.  TSECTOR needs a buffer of 1024 
bytes in length.  The calling program must furnish the starting 
address of this buffer in the H-L register pair.  The H register 
must contain the high order byte of the address.  The program 
returns with the carry cleared if it has written every possible 
pattern to the data area and encountered no errors.  However, it 
requires a considerable length of time test for all possible 
patterns.  Therefore, the test will periodically return with the 
carry set, even though no error has occured.  When a return of this 
type is made, the H-L register pair will contain an address so that 
the program can be resumed.  Executing a PCHL instruction will 
restart the program.  The reason for this exceptional return is to 
provide a way for the calling program to abort the test or so that a 
terminal can be updated to inform the user that the test is still 
alive and functioning correctly.  In the event that the calling 
program does some computing before restarting the test, the H-L 
register pair should be preserved.

     If the program encounters an error, it returns with the carry 
flag set and a pattern in the A register which indicates the cause 
of the return.  This error information is detailed below:

          a.  Bit 1 set  -  Controller busy.

          b.  Bit 3 set  -  Periodic retrun with no error found
                            H-L pair contains restart address.
     
          c.  Bit 5 set  -  Drive not ready

          d.  Bit 6 set  -  C register value not between 1 and 32.

          e.  Bit 7 set  -  Data error encountered.

     If a data error occured, The first half of the buffer furnished 
by the calling program contains the pattern that was last written to 
the disk while the second half contains the pattern that was last 
read.  If the twot are identical, a hard CRC error was encountered.
.pa
.he                   HARDWARE LEVEL REGISTERS
INTRODUCTION

     Users desiring a greater degree of control over the disk than 
afforded by the software drivers described previously may wish to 
refer directly to the I/O device registers on the Disk Jockey Hard 
Disk Controller.  There are seven one-byte registers.  Three are 
read only, three are write only and one is read/write.  These 
registers occupy four locations in the I/O address space of the 
system.  They may appear anywhere in this space.  The only restrict-
ion being that the lowest of the four addresses must be divisible by 
four.  
.he Hardware Level Registers

     
I/O ADDRESSING

     At location 5D on the circuit board, there is an eight position 
DIP switch which is used to determine the starting address of the 
controller.  One of the switches is not used and another serves as a 
board enable switch.  The other six are connected to a comaprator 
which compares switch settings with I/O addresses on the bus.  If 
there is a match and the board is enabled, I/O commands are allowed 
to access the controller.  Below is a layout of this DIP switch.


                  N/C  ENABL  AD5   AD4   AD2   AD3   AD6   AD7
                 __|_____|_____|_____|_____|_____|_____|_____|__
                |  |     |     |     |     |     |     |     |  |
  position   on |  |     |     |     |     |     |     |     |  |
     5D         |  1     2     3     4     5     6     7     8  |
           off  |                                               |
                |_______________________________________________|

     
     As an example of addressing the Disk Jockey HD Controller, the 
following switch settings will address the board to respond to I/O 
addresses 120Q through 123Q (50H - 53H):


                  off  on  on off  on  on off  on
                  _______________________________
                 |                               |
                 | 1   2   3   4   5   6   7   8 |
                 |_______________________________|


I/O REGISTER MAP
               
     Let A represent the address of register 0 of the controller.  
In boards with standard addresses, A = 120Q (50H).  The addresses of 
the controller registers are then:

.cp 7
    Address  Standard Value  Symbolic Value          Function
             Octal    Hex

     A       120      50     STATUS/CONTL    Status/Control Port
     A+1     121      51     DATA            Controller Data Port
     A+2     122      52     FUNCTN          Drive Function Port
     A+3     123      53     COMD/RESULT     Command/Aux Status Port


READABLE REGISTERS

Register 0 - The Main Status Port for the Controller and Drive.
             Location 120Q (50H) in the standard system.

     This register contains bits that identify the current status of 
the Disk Jockey Controller and the currently selected drive.  The 
details of this register are presented below:

                         CONTROLLER STATUS REGISTER

             BIT           7  6  5  4  3  2  1  0
                     HALT__|  |  |  |  |  |  |  |__TRACK0
                   ILEVEL_____|  |  |  |  |  |_____OPDONE
                   NREADY________|  |  |  |________COMPLT
                   NFAULT___________|  |___________TIMOUT
                    
HALT   - This is the "not busy" flag of the controller.  When the 
         Disk Jockey is not executing a command, this bit is a 1.  
         When a data transfer command is strobed into the command 
         register, the halt bit is reset to  0.  At this point the 
         controller is busy and will not respond to new commands 
         until the HALT bit is again 1.  Moreover, while HALT is 0 
         the CPU does not have access to the internal data bus and 
         therefore cannot read from or write to the controller's 
         data buffer.  A program interfacing directly to the Disk 
         Jockey controller should monitor this bit to determine when 
         a command completes.  The Main Status Register interfaces 
         directly to the S-100 DI (Data Input) bus to allow the 
         system to have access to the status port regardless of the 
         state of the controller.

ILEVEL - This bit changes state each time the controller receives an 
         index pulse from the currently selected drive.  Drives that 
         are not selected or not ready cannot transmit index pulses.
         Thus, ILEVEL only toggles when the selected drive is ready.

NREADY - This bit is a 0 only when the currently selected drive has 
         power turned on and is ready to receive commands or 
         transfer data.

NFAULT - Each drive in the system, when selected, sends a negative 
         logic signal to the controller called WRITE FAULT.  NFAULT 
         monitors this line from the drive.  WRITE FAULT is active 
         (set to 0) if an illegal logic condition existed during a 
         data transfer to the drive.  An example of an illegal logic 
         condition is that READ GATE and WRITE GATE were active at 
         the same time.  This could happen, for example, if the 50 
         conductor cable between the controller and the drive were 
         installed upside down at one end.  There are also other 
         conditions which could occur internal to the drive which 
         can cause WRITE FAULT to be active (see the drive manual 
         for details).  Occasionally, WRITE FAULT is active when a 
         drive is first powered up.  The controller, as a matter of 
         course, resets WRITE FUALT on drives that it selects for 
         the first time.  Under normal conditions, NFAULT is 1.

TIMOUT - This bit is the latched output of a counter which is 
         clocked by index pulses from the currently selected drive.  
         The counter is enabled when the controller is busy.  If a 
         command is in progress after 8 revolutions of the disk, 
         TIMOUT is set to 1 and the command is terminated.  This 
         insures that the controller will never "hang" trying to 
         complete a command.  Typically, this bit is set when the 
         controller is asked to search for a sector header image 
         that does not exist on the current track.  TIMOUT is reset 
         whenever a new command is sent to the controller.

COMPLT - Each drive in the system (which is ready) sends a negative 
         logic signal to the controller called SEEK COMPLETE.  This
         signal is present even if the drive is not selected.  When
         a drive receives a head step command (or a burst of head 
         step commands), the drive logic sets the SEEK COMPLETE line 
         false.  While the heads are moving to a new track this 
         signal remains false.  SEEK COMPLETE goes active again just 
         when the heads have stopped (but not settled).  When all 
         the SEEK COMPLETE lines from the drives are active, COMPLT 
         is 1.  If any drive's heads are in motion, COMPLT is 0.

OPDONE - This bit is set to a 1 whenever the controller finishes a 
         data transfer command.  It is reset whenever any command is 
         issued to the controller (even a no-op command).

NTRCK0 - This bit is 0 when the heads of the currently selected 
         drive are positioned over track 00.  If the heads are over 
         any other track, NTRK0 is 1.


                                                       
Register 1 - Auxiliary Status Port for the Controller and Drive.
             Location 123Q (53H) in the standard system.

     This register is four bits wide and contains the auxiliary 
status information regarding the drive and controller.  The details 
of these bits are presented below:

.cp 7
                          AUXILIARY STATUS REGISTER

                                       3  2  1  0
                                       |  |  |  |__SDONE
                                       |  |  |_____RETRY
                                       |  |________R0
                                       |___________R1
                                        
R0,R1  - These two bits are used by the controller to inform 
         external software as the the revision level of the board.  
         The encoding scheme for R0 and R1 is given below:

                         ___________________________
                        |  R1  |  R0  |  rev level  |
                        |------|------|-------------|
                        |  1   |  1   |     0       |
                        |  1   |  0   |     1       |
                        |  0   |  1   |     2       |
                        |  0   |  0   |     3       |
                        |______|______|_____________|


RETRY  - When data is transfered from the disk to the controller, 
         the serial stream is routed to two places:  the data shift 
         register where the data is assembled into 8 bit bytes for 
         storage in the data buffer and to the CRC logic where the 
         polynominal division is performed.  However, the last 16 
         bits of any transfer is the CRC error check word.  These 
         bits are not stored in memory but are processed by the CRC 
         logic.  The last task of any command that transfers data 
         from the disk to the controller is to dump the contents of 
         the CRC check sum register.  If this register has any non-
         zero bits, RETRY is set to 1.  If the CRC register is all 
         zeros, RETRY remains 0.  At the beginning of any command, 
         RETRY is set to 0.  Thus, RETRY is the "read data" error 
         flag.  If RETRY is high after a read command, the calling 
         program should read the data again.  If RETRY remains high 
         through 10 trys, a hard error is present on the sector.  
         When the controller is asked to search for a sector  header 
         image that does not exist on the current track, both TIMOUT 
         and RETRY will be high.  In fact, if both TIMOUT and RETRY 
         are high, the track is not formatted, there is a hard error 
         in a sector header field, or the controller has an improper 
         sector header image in header area of its data buffer.  The 
         last possibility being the most likely.

SDONE  - Whenever the COMPLT bit of the main status register makes a 
         transition from 0 to 1, SDONE is set to 1.  Any command to 
         the controller (including no-ops) will clear SDONE to 0.


.cp 10
READ/WRITE REGISTERS

Register 2 - The Controller Data Port.
             Location 121Q (51H) in the standard system.

     This register is used to transfer data between memory and the 
contoller.  Data that is in memory which is destined for the disk 
must first be moved to the controller's data buffer.  When data is 
read from the disk, the controller's only job is to move the data to 
its internal buffer.  The CPU is has the responsibility to move the 
information from the controller to main memory.  This the Data Port 
is the window between the computer and the disk.

     Associated with the data port is a pointer which serves to 
address different locations in the on-board data buffer.  This 
pointer is incremented just after any reference to the data port.
The pointer can be reset to the upper or lower halves of the buffer 
by commands to the controller (refer to the command port).  Each 
half of the data buffer is 512 bytes long.  The upper half is for 
data while the lower half is used to locate different sectors on the 
disk.  The controller uses only the first 6 bytes of the lower half 
of the buffer.  The remainder of this area is available to the 
system.

     Data is transfered to the buffer by first resetting the pointer 
and then making successive references to the data port.  The address 
pointer to the data buffer will automatically increment after each 
reference.  If data is written to the buffer by the CPU, it will 
remain stable until the controller write to the buffer during a disk 
read operation.  Likewise, once a read operation has loaded the 
buffer, the CPU may retreive data from it as often as desired.


WRITE ONLY REGISTERS

Register 2 - The Control Port.
             Location 120Q (50H) in the standard system.

     This is a four bit wide register which functions as the master 
control port for the board.  The high order data bits are ignored 
when control words are transfered to this register.  The function of 
the bits of this port are explained below:

                             MASTER CONTROL PORT

                                       3  2  1  0
                                       |  |  |  |__ENBLFN
                                       |  |  |_____RUN
                                       |  |________DSKCLK
                                       |___________WPROT

WPROT  - This bit serves two purposes depending on the state of the 
         NFAULT bit of the main status register.  When WPROT is a 1, 
         the currently selected will be write protected as long as 
         there are no write fault conditions present.  If NFAULT=0, 
         WPROT will reset a write fault condition when it is brought 
         high and then low.  The drive is write enabled when WPROT 
         is 0 AND NFAULT is 1.  That is the disk will accept write 
         commands if there are not write fault conditions present 
         and the write protect bit, WPROT, is not high.

DSKCLK - This bit determines how the master clock of the controller 
         will be driven.  If DSKCLK is 0, the master clock signal on 
         the board will come from PHASE2 - Pin 24 of the S-100 bus.  
         If DSKCLK is 1, the currently selected drive will furnish 
         the master clock to the controller.  During data transfers, 
         DSKCLK must be a 1.  However, if the selected drive is not 
         ready, or has encountered a write fault condition, it does 
         not transmit any clock signals.  In such a situation, the 
         DSKCLK bit should be brought low so that the controller 
         will respond to commands.
         
RUN    - When this bit is 0, the controller is reset and halted.  It 
         will not respond to commands - not even the buffer pointer 
         reset commands.  This bit is the master enable signal for 
         the controller and should be set to 1 just after the first 
         drive in the system is ready and does not have a write 
         fault condition pending.

