ASMB,L
      NAM DISVF 91711-16013  REV 1926  790421 
      ENT DISVF 
      EXT .ENTR,$LIBR,$LIBX 
* 
      MIC STE,105304B,0    DSTRBTD SYS SELF TEST IN 21MX-E. 
      MIC STM,105524B,0    DSTRBTD SYS SELF TEST IN 21MX-M. 
* 
A     EQU 0B        THIS IS THE A REGISTER. 
* 
**********************************************************************
*                                                                    *
*     DISTRIBUTED SYSTEM FIRMWARE VERIFICATION                       *
*                                                                    *
*     CALL DISVF(ICODE)                                              *
*                                                                    *
*     RETURNS:   ICODE = 0     DISTRIBUTED SYSTEM FIRMWARE NOT       *
*                              INSTALLED OR FAILED                   *
*                ICODE > 0     ICODE = FIRMWARE REV. NUMBER          *
*                                                                    *
**********************************************************************
* 
ICODE NOP 
* 
DISVF NOP           ENTRY POINT 
      JSB .ENTR     GET ADDRESSES 
      DEF ICODE 
* 
* WE NOW GO INVOKE THE DS/1000 SELF-TEST ON LINE. 
* 
SELFT LDA STMIN     INITIALISE MACRO INSTRUCTION
      STA SFTIN       FOR 21MX-M OPERATION. 
* 
      JSB $LIBR     DISABLE RTE'S DEFENSES! 
      NOP 
      LIB 01B       GET CURRENT CONTENTS OF S REGISTER. 
      STB SAVSW     SAVE IT, TEMPORARILY. 
* 
      CCB 
      LDA STEIN     GET 21MX-E MACRO INSTRUCTION. 
      OCT 100060    INVOKE TIMER, IF ANY. 
      STA SFTIN     CAN ONLY GET HERE IF E OR F MACHINE.
* 
SFTIN STM           INVOKE DS/1000 SELF-IDENT TEST. 
      CLA,RSS       INVALID FIRMWARE INSTALLED. 
      LIA 01B       GET RETURNED REV CODE IN BCD FORMAT.
      LDB SAVSW     GET SAVD SWITCH-REG CONTENTS. 
      OTB 01B       RESTORE ORIGINAL CONTENTS OF 'S'. 
* 
      JSB $LIBX     RE-ENABLE NORMAL RTE OPERATION. 
      DEF *+1 
      DEF *+1 
* 
      STA BCDN      SAVE BCD REV CODE.
* 
* WE GO CONVERT TO OCTAL REV CODE.
* 
      AND MASK      GET THE LOWER FOUR BITS.
      ADA ATBL0     GET ADDRESS IN CONVERSION TABLE.
      LDB A,I       GET CONTENTS OF CONVERSION TABLE. 
      STB OCTN      START BUILDING OCTAL NUMBER.
      LDA BCDN      LOAD A WITH ORIGINAL BCD NUMBER.
      ALF           GET MOST SIG. BCD DIGIT INTO
      AND MASK        THE LOWER FOUR BITS OF A. 
      ADA ATBL3     GET ADDRESS IN CONVERSION TABLE.
      LDB A,I       GET CONTENTS OF CONVERSION TABLE. 
      ADB OCTN      CONTINUE BUILDING OCTAL NUMBER. 
      STB OCTN      TIDY AWAY INTERIM RESULT. 
      LDA BCDN      LOAD A WITH ORIGINAL BCD NUMBER.
      ALF,ALF       GET 2ND MOST SIGNIFICANT BCD
      AND MASK        DIGIT INTO THE LOWER FOUR BITS OF A.
      ADA ATBL2     GET ADDRESS IN CONVERSION TABLE.
      LDB A,I       GET CONTENTS OF CONVERSION TABLE. 
      ADB OCTN      CONTINUE BUILDING OCTAL NUMBER. 
      STB OCTN      TIDY AWAY INTERIM RESULT. 
      LDA BCDN      LOAD A WITH ORIGINAL BCD NUMBER.
      ALF,ALF       GET 3RD MOST SIGNIFICANT BCD
      ALF             DIGIT INTO THE LOWER
      AND MASK          FOUR BITS OF THE A REGISTER.
      ADA ATBL1     GET ADDRESS IN CONVERSION TABLE.
      LDB A,I       GET CONTENTS OF CONVERSION TABLE. 
      ADB OCTN      COMPLETE BUILDING OCTAL NUMBER. 
* 
DONE  STB ICODE,I   RETURN ICODE
      JMP DISVF,I   RETURN
* 
* TABLE ADDRESS AREA. 
* 
ATBL0 DEF TBL0      4TH MOST SIGNIFICANT BCD TABLE. 
ATBL1 DEF TBL1      3RD MOST SIGNIFICANT BCD TABLE. 
ATBL2 DEF TBL2      2ND MOST SIGNIFICANT BCD TABLE. 
ATBL3 DEF TBL3      MOST SIGNIFICANT BCD DIGIT TABLE. 
* 
* TABLE AREA. 
* 
TBL0  OCT 0,1,2,3,4,5 
      OCT 6,7,10,11 
TBL1  OCT 0,12,24,36,50 
      OCT 62,74,106,120,132 
TBL2  OCT 0,144,310,454,620 
      OCT 764,1130,1274,1440,1604 
TBL3  OCT 0,1750,3720,5670,7640 
      OCT 11610,13560,15530,17500,21450 
* 
* VARIABLES, STORAGE AND CONSTANTS. 
* 
BCDN  OCT 0         ORIGINAL BCD NUMBER GOES HERE.
OCTN  OCT 0         INTERMEDIATE & FINAL OCTAL NUMBER.
MASK  OCT 17        MASK FOR LOWER FOUR BITS. 
SAVSW OCT 0         TEMP VALUE OF SWITCH REGISTER.
STEIN STE           21MX-E&F MACRO INSTRUCTION. 
STMIN STM           21MX- M  MACRO INSTRUCTION. 
* 
      END 
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