      LDY RT+1        MICROINSTRUCTION
      JSB WRITE 
      CLA           INITIALIZE
      CAX            RAM ADDRESS
      CAY             = RAM DATA
      LDB TMOD      CONTROL MEMORY MOD'S=2-5
      JSB LOAD1     LOAD WCS
      CLA           INITIALIZE
      STA SAVE9      RAM ADDRESS=0
      LDA .1        START AT RAM ADDRESS=1
      LDB TMOD      CONTROL MEMORY MOD'S 2-5
CLC06 CLC WCS       PUT WCS IN COMMAND STATE
OTA08 OTA WCS       SET RAM ADDRESS 
OTB05 OTB WCS       SET CONTROL MEMORY MODS 
      CPA SAVE9     OTA THE CURRENT RAM ADDRESS?
      JMP STC05     YES.GO READ IT
      INA           NO.GO DO
      JMP OTA08      ANOTHER OTA
STC05 STC WCS       PUT WCS IN DATA MODE
LIA03 LIA WCS       READ
LIB03 LIB WCS        RAM DATA 
      SZA           RAM ADDRESS=0000? 
      JMP T01.1     NO.ERROR
      SZB,RSS 
      JMP CMNDS,I   YES.DONE
T01.1 JSB ERMS,I    GO REPORT ERROR 
      DEF ECC 
      JMP CMNDS,I   DON'T GO ON 
      HED TST02-DATA MODE SCREEN TEST 
*     1.  LOADS AND VERIFIES ENTIRE WCS RAM STORAGE USING 
*         A RTN MICROINSTRUCTION
*     2.  PUTS WCS IN COMMAND STATE.
*     3.  DOES A SERIES OF OTA'S TO WCS.
*     4.  CHECKS TO MAKE SURE NO OTA'S ALTERED ANY RAM DATA.
* 
TST02 EQU * 
DMODE NOP 
      LDB TMOD      LOAD WCS WITH 
      LDX RT         A RTN MICROINSTRUCTION 
      LDY RT+1
      JSB WRITE 
      LDX RT        NOW READ IT 
      LDY RT+1       BACK FOR VERIFICATION
      JSB READ
      CLA           RAM ADDRESS=0 
      LDY B2000     SET COUNTER 
CLC03 CLC WCS       PUT WCS BACK IN COMMAND STATE 
OTA04 OTA WCS       OTA THE RAM 
      INA            ADDRESS TO WCS 
      DSY           DONE? 
      JMP OTA04     NO.CONTINUE 
      LDX RT        YES.GO BACK AND SEE 
      LDY RT+1       IF ANY RAM DATA
      JSB READ        HAS CHANGED 
      JMP DMODE,I 
      HED TST03-COMMAND STATE SCREEN TEST 
*     1.  PUTS WCS IN COMMAND STATE.
*     2.  DOES A SERIES OF LIA'S AND CHECKS TO INSURE THE RAM 
*         ADDRESS COUNTER DOESN'T GET INCREMENTED.
* 
TST03 EQU * 
CMDSS NOP 
      LDA TSTN      CONVERT TEST
      JSB QO2AS,I    # TO ASCII AND 
      STA PERRC,I     STUFF IN ERROR MSG
      LDB TMOD      LOAD WCS WITH 
      LDX RT         A RTN MICROINSTRUCTION 
      LDY RT+1
      JSB WRITE 
      LDB TMOD      LOAD RAM
      CLA            ADDRESS 0000 
      CAX             WITH RAM
      CAY              DATA = 
      JSB LOAD1         000.000000
      CLA           POINT RAM ADDRESS TO 0000 
      LDB TMOD
      LDY B2000     SET  COUNTER
CLC07 CLC WCS       PUT WCS IN COMMAND STATE
OTA17 OTA WCS       SET RAM ADDRESS INTO WCS
OTB14 OTB WCS       SET MOD # 
LIA04 LIA WCS       TRY TO READ IT
      SZA,RSS       GET 0'S BACK? 
      JMP T03.1     YES 
      JSB ERMS,I    NO.GO REPORT ERROR
      DEF ECC 
T03.1 DSY           DONE? 
      JMP LIA04     NO.CONTINUE 
      JMP CMDSS,I   YES 
      HED TST04-I/O SCREEN TEST 
*     1.  LOADS AND VERIFIES WCS USING RAM DATA = A RTN 
*         MICROINSTRUCTION. 
*     2.  LOADS RAM ADDRESS 0000 WITH RAM DATA = 000.000000.
*     3.  ISSUES A SERIES OF STC'S AND OT*'S TO ALL OTHER 
*         I/O SELECT CODES BUT THE ONE WITH WCS.
*     4.  CHECK TO INSURE AN I/O INSTRUCTION TO ANOTHER SELECT
*         CODE DID NOT CAUSE WCS TO RESPOND.
* 
TST04 EQU * 
SCREN NOP 
      LDB TMOD      LOAD WCS WITH 
      LDX RT         A RTN
      LDY RT+1        MICROINSTRUCTION
      JSB WRITE 
      CLA           LOAD RAM
      CAX            ADDRESS 0000 
      CAY             WITH RAM
      LDB TMOD         DATA = 
      JSB LOAD1         000.000000
      LDA STCXX     CONFIGURE I/O 
      AND MASK9      INSTRUCTIONS 
      IOR B10         STARTING AT 
      STA STCXX        SELECT CODE
      LDA OTAXX         10
      AND MASK9 
      IOR B10 
      STA OTAXX 
      LDA OTBXX 
      AND MASK9 
      IOR B10 
      STA OTBXX 
T04.3 CLA 
      LDB TMOD
CLC13 CLC WCS       SET RAM 
OTA19 OTA WCS        ADDRESS
OTB15 OTB WCS         TO 0000 
      LDA STCXX     CURRENT SELECT
      AND B77        CODE = THE 
      CPA USSC        WCS SELECT CODE?
      JMP T04.1     YES.SKIP I/O INSTRUCTIONS 
      CCA           NO.ARRANGE
      CCB            REGISTERS
STCXX STC 0         ISSUE I/O INSTRUCTIONS
OTAXX OTA 0          EQUIVALENT TO LOADING
OTBXX OTB 0           WCS WITH ALL ONES 
T04.1 LDA STCXX     DONE ALL
      AND B77        THE SELECT 
      CPA B77         CODES PRESENT?
      JMP SCREN,I   YES.DONE
      ISZ STCXX     BUMP
      ISZ OTAXX      SELECT 
      ISZ OTBXX       CODES 
      SKP 
STC09 STC WCS       GET RAM 
LIA08 LIA WCS        CONTENTS 
LIB07 LIB WCS 
      STA SAVE2     ANY BITS
      AND MASK1      IN THE 
      SZA             LEFT BYTE?
      JSB ERRAA     YES.ERROR 
      LDA SAVE2     RAM ADDRESS 
      SZA            COUNTER BEEN ALTERED?
      JMP T04.2     YES.ERROR 
      SZB,RSS 
      JMP T04.3     NO.CONTINUE 
T04.2 LDA STCXX     GET BAD SELECT
      AND B77        CODE IN A-REG
      ADA .M1         FOR ERROR HALT
      STA ZSAVA 
      JSB ERMS,I    GO REPORT ERROR 
      DEF E004
      JMP SCREN,I   DON'T GO ON 
      HED TST05-RAM ADDRESS ROLLOVER TEST 
*     1.  LOADS ENTIRE WCS RAM STORAGE USING A RTN MICROINSTRUCTION 
*     2.  CONTINUES LOADING WCS USING FALSE RAM ADDRESSES UP THRU 
*         7777 FOR RAM DATA.
*     3.  VERIFY DATA FOR EACH ROLLOVER.
* 
TST05 EQU * 
RADOL NOP 
      LDA B2000     START ROLLOVER
T05.1 STA SAVE1      AT LAST RAM ADDRESS+1
      LDB TMOD      CONTROL MEMORY MOD'S 2-5
      LDX RT        RTN MICRO-
      LDY RT+1        INSTRUCTION 
      JSB WRITE     LOAD WCS RAM STORAGE
      CLA           USE RAM DATA= 
      LDB SAVE1      LAST RAM ADDRESS+1 
      LDY B2000     SET COUNTER 
OTA09 OTA WCS       CONTINUE LOADING WCS RAM
OTB06 OTB WCS        STORAGE WITH CONTINUED ADDRESS 
      DSY           DONE? 
      JMP OTA09     NO.CONTINUE 
      CLA           YES.NOW GO
      CAX            CHECK IF RAM 
      LDY SAVE1       ADDRESS ROLLED
      JSB READ         OVER CORRECTLY 
      LDA SAVE1     DONE THRU RAM 
      CPA B6000      ADDRESS=7777?
      JMP RADOL,I   YES 
      ADA B2000     NO.BUMP RAM 
      JMP T05.1      ADDRESS BY 2000
      HED TST06-PRESET TEST 
*     1.  PUTS WCS IN DATA MODE.
*     2.  HALTS FOR OPERATOR PRESET.
*     3.  CHECKS WCS FOR COMMAND STATE. 
* 
TST06 EQU * 
PREST NOP 
      LDB TMOD      LOAD WCS
      LDX RT         WITH A RTN 
      LDY RT+1         MICROINSTRUCTION 
      JSB WRITE 
      CLA           LOAD RAM
      CAX            ADDRESS 0000 
      CAY             WITH RAM
      LDB TMOD         DATA = 
      JSB LOAD1         000.000000
      LDB MASK6     SKIP OPERATOR 
      JSB SWRT,I     INTERVENTION?
      JMP T06.4     YES.USE CLC 0 FOR CRS 
      JSB MSGH,I    OPERATOR
      DEF H033       PRESET 
T06.3 CLA           POINT RAM ADDRESS TO 0000 
      LDY B2000     SET COUNTER 
OTA18 OTA WCS       SET RAM ADDRESS ON WCS
LIA06 LIA WCS       TRY TO
LIB05 LIB WCS        READ DATA
      SZA,RSS       GET 0'S?
      JMP T06.1     YES.OK
T06.2 LDA TSTN      NO.CONVERT TEST # 
      JSB QO2AS,I    TO ASCII AND 
      STA PERRC,I     STUFF IN MSG ECC
      JSB ERMS,I    REPORT
      DEF ECC        ERROR
      JMP PREST,I 
T06.1 SZB           GET 0'S ON 2ND READ?
      JMP T06.2     NO.ERROR
      DSY           YES.DONE? 
      JMP LIA06     NO
      JMP PREST,I   YES 
T06.4 CLC INTP      GENERATE CRS VIA CLC 0
      JMP T06.3      INSTEAD OF PRESET
      HED TST07-ZEROS DATA TEST 
*     LOADS AND VERIFIES ENTIRE WCS RAM STORAGE USING RAM 
*     DATA OF A ONE IN A FIELD OF 23 ZEROS. 
* 
TST07 EQU * 
ZEROS NOP 
      LDA B200      INITIALIZE
      CLB            RAM DATA 
T07.1 STA SAVE4       PATTERN 
      STB SAVE1 
      LDB TMOD      LOAD WCS
      LDX SAVE4      WITH RAM 
      LDY SAVE1       DATA
      JSB WRITE 
      LDX SAVE4     NOW READ
      LDY SAVE1       DATA BACK 
      JSB READ         FOR VERIFICATION 
      LDA SAVE4     ROTATE A ONE
      LDB SAVE1      IN A FIELD OF
      RRR 1           ZEROS FOR RAM DATA
      CPA B100K     DONE? 
      JMP ZEROS,I   YES 
      JMP T07.1     NO.CONTINUE 
      HED TST10-ONES DATA TEST
*     LOADS AND VERIFIES ENTIRE WCS RAM STORAGE USING RAM 
*     DATA OF A ZERO IN A FIELD OF 23 ONES. 
* 
TST10 EQU * 
ONES  NOP 
      LDA B177      INITIALIZE
      CCB            RAM DATA 
T10.1 STA SAVE4       PATTERN 
      STB SAVE1 
      LDB TMOD      LOAD WCS
      LDX SAVE4      WITH RAM 
      LDY SAVE1       DATA
      JSB WRITE 
      LDX SAVE4     NOW READ
      LDY SAVE1      DATA BACK
      JSB READ        FOR VERIFICATION
      LDA SAVE4     ROTATE A ZERO 
      LDB SAVE1      IN A FIELD 
      RRR 1           OF ONES 
      SSA,RSS       DONE? 
      JMP ONES,I    YES 
      AND B377      NO.CONTINUE 
      IOR B200
      JMP T10.1 
      HED TST11-LONELY BIT DATA TEST
*     1.  WRITES 1K RAM STORAGE TO A BACKGROUND PATTERN.
*     2.  WRITES RAM ADDRESS 0 TO A TEST PATTERN. THIS BECOMES
*         THE CURRENT TEST LOCATION.
*     3.  READS THE ENTIRE RAM STORAGE TO VERIFY DATA.
*     4.  BUMPS TEST LOCATION. GO BACK TO 2. CONTINUE UNTIL 
*         TEST LOCATION=LAST LOCATION IN 1K.
*     5.  REPEAT TEST COMPLEMENTING TEST & BACKGROUND PATTERNS. 
* 
TST11 EQU * 
LBIT  NOP 
      CLA           INITIALIZE TEST 
      STA SAVE4      ADDRESS TO 0 
      LDB B377      TEST
      STB TEST1      PATTERN
      CCB             OF
      STB TEST2        377.177777 
      CLA           BACKGROUND
      CAX            PATTERN
      CAY             OF
T11.0 STX BACK1        000.000000 
      STY BACK2 
      LDB TMOD      WRITE WCS 
      JSB WRITE      TO BACKGROUND
T11.9 LDA SAVE4     WRITE TEST
      LDX TEST1      LOCATION TO
      LDY TEST2       THE TEST
      LDB TMOD         PATTERN
      JSB LOAD1 
      SZA,RSS       AT RAM ADDRESS 0? 
      JMP T11.2     YES.DON'T WRITE BACKGROUND
      ADA .M1       NO.POINT BACK TO OLD TEST LOC.
      STA SAVE9     UPDATE BACKGROUND ADDRESS 
      LDX BACK1     WRITE 
      LDY BACK2      BACKGROUND 
      LDB TMOD        ON OLD TEST 
      JSB LOAD1        LOCATION 
T11.2 CLA           START AT RAM ADDRESS 0000 
      STA SAVE9     SAVE IT AS BACKGROUND ADR.
T11.3 CPA SAVE4     AT A TEST LOCATION? 
      JMP T11.1     YES 
      LDX BACK1     NO.USE
      LDY BACK2      BACKGROUND 
T11.6 LDB TMOD      CONTROL MEMORY MOD'S 2-5
      JSB READ1     READ WCS
      CPA B1777     DONE ALL RAM ADDRESSES? 
      JMP T11.8     YES 
      INA           NO.BUMP 
      ISZ SAVE9      POINTERS 
      JMP T11.3 
      SKP 
T11.1 LDX TEST1     USE TEST
      LDY TEST2      PATTERN
      JMP T11.6 
T11.8 LDA SAVE4     DONE ALL
      CPA B1777      TEST LOCATIONS 
      JMP T11.7     YES.GO CHECK PATTERNS 
      INA           NO.BUMP TEST
      STA SAVE4      LOCATION 
      JMP T11.9 
T11.7 LDA BACK1     DONE COMPLEMENT 
      SZA            PATTERNS?
      JMP LBIT,I    YES.DONE
      STA TEST1     NO.COMPLEMENT 
      STA TEST2      PATTERNS AND GO
      STA SAVE4       DO TEST AGAIN 
      LDX B377         DO TEST
      LDY .M1           AGAIN 
      JMP T11.0 
      HED TST12-ADDRESS PARITY TEST 
*     LOADS AND VERIFIES ENTIRE WCS USING RAM DATA=PARITY(EVEN AND
*     ODD) OF RAM ADDRESS.
* 
TST12 EQU * 
ADPAR NOP 
      CLA           INITIALIZE RAM
      STA SAVE4      ADDRESS TO 0 
      STA WFLAG     SET WRITING FLAG
      STA PFLAG     START WITH ODD PARITY 
      LDB B377      TEST
      STB TEST1      PATTERN
      CCB             OF
      STB TEST2        377.177777 
      LDX .0        BACKGROUND
      LDY .0         PATTERN
T12.1 STX BACK1       OF
      STY BACK2        000.000000 
T12.8 LDY .M16      SET COUNTER 
      LDA SAVE4     GET ADDRESS 
      CLE           CLEAR PARITY FLAG 
T12.2 RAR,SLA       COUNT 
      CME            BITS IN
      ISY             RAM 
      JMP T12.2        ADDRESS
      SEZ           EVEN OR ODD?
      JMP T12.3 
      LDX TEST1     EVEN.GET
      LDY TEST2      TEST PATTERN 
      JMP T12.4 
T12.3 LDX BACK1     ODD.GET 
      LDY BACK2      BACKGROUND 
T12.4 LDB TMOD      CONTROL MEMORY MOD'S 2-5
      LDA WFLAG     WRITING OR
      SZA            READING? 
      JMP T12.6 
      LDA SAVE4     WRITING.GO
      JSB LOAD1      LOAD WCS 
      JMP T12.5 
      SKP 
T12.6 LDA SAVE4     READING.GO
      JSB READ1      READ WCS 
T12.5 CPA B1777     DONE ALL RAM ADDRESSES? 
      JMP T12.7     YES 
      INA           NO.BUMP 
      STA SAVE4      RAM ADDRESS
      JMP T12.8       AND CONTINUE
T12.7 LDA WFLAG     JUST FINISH 
      SZA            WRITING? 
      JMP T12.9     YES.GO SEE IF DONE
      STA SAVE4     NO.RESET RAM ADDRESS
      CCA           SET READING 
      STA WFLAG      FLAG & GO BACK 
      JMP T12.8       AND READ DATA 
T12.9 LDA PFLAG     JUST FINISH 
      SZA            ODD PARITY?
      JMP ADPAR,I   YES.DONE
      STA SAVE4     NO.RESET RAM ADDRESS
      STA WFLAG     RESET WRITING FLAG
      STA TEST1     REVERSE 
      STA TEST2      TEST AND 
      STY PFLAG       BACKGROUND PATTERNS 
      JMP T12.1 
      HED TST13-RAM CHECKERBOARD DATA TEST
*     LOADS AND VERIFIES WCS RAM STORAGE TO A CHECKERBOARD PATTERN
*     FOR EACH 32X32 ARRAYED RAM CHIP(M0 EOR M5). 
* 
TST13 EQU * 
CHEKR NOP 
      CLA           INITIALIZE RAM
      STA SAVE4      ADDRESS TO 0 
      STA WFLAG     SET WRITING FLAG
      LDB B377      TEST
      STB TEST1      PATTERN
      CCB             OF
      STB TEST2        377.177777 
      LDX .0        BACKGROUND
      LDY .0         PATTERN
T13.8 STX BACK1       OF
      STY BACK2        000.0000000
T13.6 LDA SAVE4     ARE BITS 0
      AND MASK3      AND 5 OF RAM 
      SZA,RSS         ADDRESS CLEAR?
      JMP T13.1     YES 
      CPA MASK3     ARE BITS 0 & 5 SET? 
      JMP T13.1     YES 
      LDX TEST1     NO.USE
      LDY TEST2      TEST PATTERN 
      JMP T13.2 
T13.1 LDX BACK1     USE 
      LDY BACK2      BACKGROUND 
T13.2 LDB TMOD      CONTROL MEMORY MOD'S 2-5
      LDA WFLAG     WRITING 
      SZA            OR READING?
      JMP T13.3 
      LDA SAVE4     WRITING.GO
      JSB LOAD1      LOAD WCS 
      JMP T13.4 
      SKP 
T13.3 LDA SAVE4     READING.GO
      JSB READ1      READ WCS 
T13.4 CPA B1777     DONE ALL RAM ADDRESSES? 
      JMP T13.5     YES 
      INA           NO.BUMP RAM 
      STA SAVE4      ADDRESS POINTER
      JMP T13.6       AND CONTINUE
T13.5 LDA WFLAG     JUST FINISH 
      SZA            WRITING? 
      JMP T13.7     NO
      STA SAVE4     YES.RESET RAM ADDRESS 
      CCA           GO BACK 
      STA WFLAG      AND READ 
      JMP T13.6       WCS 
T13.7 LDA BACK1     DONE THE
      SZA            COMPLEMENT?
      JMP CHEKR,I   YES.DONE
      STA WFLAG     NO.COMPLEMENT 
      STA SAVE4      RAM DATA 
      STA TEST1       PATTERNS
      STA TEST2        AND GO 
      LDX B377          DO TEST AGAIN 
      LDY .M1 
      JMP T13.8 
      HED TST14-ALTERNATE WORD DATA TEST
*     LOADS AND VERIFIES WCS RAM STORAGE USING RAM DATA OF
*     ALTERNATING 1'S AND 0'S IN AN OTA,LIA,OTB,LIB,OTA,LIA,ETC.
*     SEQUENCE
* 
TST14 EQU * 
ALTRN NOP 
      LDB TMOD      LOAD WCS
      LDX PATT1      WITH RAM 
      LDY PATT2       DATA =
      JSB WRITE        252.125252 
      LDX PATT1     NOW READ
      LDY PATT2      IT BACK FOR
      JSB READ        VERIFICATION
      CLA           GO DO 
      LDB TMOD       ALTERNATING
      LDX PATT3       WRITE/READ
      LDY PATT4        SEQUENCE 
      JSB ALTST 
      LDB TMOD      LOAD WCS
      LDX PATT3      WITH RAM 
      LDY PATT4       DATA =
      JSB WRITE        125.052525 
      LDX PATT3     NOW READ
      LDY PATT4      IT BACK FOR
      JSB READ        VERIFICATION
      CLA           GO DO 
      LDB TMOD      ALTERNATING 
      LDX PATT1       WRITE/READ
      LDY PATT2        SEQUENCE 
      JSB ALTST 
      JMP ALTRN,I 
      HED TST15-DCPC TEST 
*     1.  CHECK FOR PRESENCE OF DCPC.IF NOT PRESENT,SKIP TEST.
*     2.  LOADS WCS WITH PROGRAM AREA FROM 4000-6000 FOR DATA.
*     3.  READ WCS TO VERIFY DATA.
* 
TST15 EQU * 
DCPC  NOP 
      LDA CPTO      IS
      AND MASK4      DCPC 
      SZA,RSS         PRESENT?
      JMP DCPC,I    NO.SKIP TEST
      LDA .M16      YES.SET 
      STA SAVE1      COUNTER
      LDA USSC      GET WCS SELECT CODE 
      OTA DCPCH     INITIALIZE
      CLC DCPCL      DCPC FOR AN
      LDA CW2         OUTPUT OF 2K
      OTA DCPCL        WORDS(1K RAM WORDS)
      STC DCPCL         NO STC OR CLC 
      LDA CW3 
      OTA DCPCL 
      CLA           SET RAM ADDRESS=0 
      LDB TMOD      CONTROL MEMORY MOD'S 2-5
CLC09 CLC WCS       PUT WCS IN COMMAND STATE
OTA12 OTA WCS       SET RAM ADDRESS 
OTB09 OTB WCS       SET CONTROL MEMORY MOD'S
STC07 STC WCS       PUT WCS IN DATA MODE
      STC DCPCH,C   START DCPC
T15.2 SFS DCPCH     TRANSFER COMPLETE?
      CLA,INA,RSS   NO.GO WAIT
      JMP T15.1 
      JSB TMRR,I    DELAY APPROX. 1 MILLISECOND 
      ISZ SAVE1     DELAYED 16 TIMES? 
      JMP T15.2     NO.TRY AGAIN
      JSB ERMS,I    YES.ERROR 
      DEF E034
      JMP DCPC,I    SKIP TEST 
T15.1 LDA CW2       GET POINTER 
      STA SAVE5      TO MEMORY
      CLB           RAM ADDRESS 
      STB SAVE4      = 0
T15.3 LDA SAVE5,I   GET 8MSB
      AND MASK2          LOADED 
      LDX A           IN X-REG
      ISZ SAVE5     GET 16LSB 
      LDY SAVE5,I    LOADED IN Y-REG
      LDA SAVE4     GET RAM ADDRESS 
      JSB READ1     READ BACK DATA
      CPA B1777     DONE? 
      JMP DCPC,I    YES 
      INA           NO.BUMP 
      STA SAVE4      POINTERS 
      ISZ SAVE5       AND 
      JMP T15.3        CONTINUE 
      HED TST16-CONTROL MEMORY PRIORITY TEST
*     ENTIRE WCS RAM STORAGE IS LOADED WITH AN "RTN INC A A"
*     MICROINSTRUCTION AND THEN WCS IS SET TO 
*     MOD'S FOR FLOAT. A FLT(105120) MACROINSTRUCTION IS
*     THEN EXECUTED TO VERIFY WCS PRIORITY OVER FLOAT MICROCODE 
* 
TST16 EQU * 
PRIOR NOP 
      LDB FLTMD    LOAD WCS 
      LDX P1         WITH "RTN INC A A" 
      LDY P1+1
      JSB WRITE        MICROINSTRUCTION 
      LDA FLOAT     SET UP
      STA M16.1      FLT MACRO
      CLA           ARRANGE 
      CCB            REGISTERS
      CAX           SAVE
      CBY            REGISTERS
STF01 STF WCS       ENABLE WCS
M16.1 BSS 1         EXECUTE MACRO 
CLF05 CLF WCS       DISABLE WCS TO ALLOW EIG INSTR. 
      CPA .1        A-REG GET INCREMENTED?
      JMP T16.1     YES.OK
      SZA           NO.DID FLT GET EXECUTED?
      JMP T16.2     NO
      SZB,RSS       DID FLT GET EXECUTED? 
      JMP T16.3     YES 
T16.2 JSB ERR36     NO
      JMP PRIOR,I 
T16.3 JSB ERMS,I    PRIORITY ERROR
      DEF E016
      JMP PRIOR,I   CAN'T GO ON 
T16.1 CPB .M1       B-REG UNCHANGED?
      JMP PRIOR,I   YES.DONE
      SZA           NO.DID FLT GET EXECUTED?
      JMP T16.2     NO
      SZB           DID FLT GET EXECUTED? 
      JMP T16.2     NO
      JMP T16.3     YES.PRIORITY ERROR
      HED TST17-WCS ENABLE/DISABLE TEST 
*     ENTIRE WCS RAM STORAGE IS LOADED WITH AN "RTN INC A A"
*     MICROINSTRUCTION AND THEN WCS ENABLE/DISABLE
*     CONTROLS ARE TESTED.
* 
TST17 EQU * 
ENDIS NOP 
      LDB FLTMD    LOAD WCS 
      LDX P1         WITH "RTN INC A A" 
      LDY P1+1
      JSB WRITE        MICROINSTRUCTION 
      LDA FLOAT     SET UP
      STA M17.1      FLT MACRO
      STA M17.2       CALLS 
      CLA           ARRANGE 
      CCB            REGISTERS
      CAX           SAVE
      CBY            REGISTERS
STF02 STF WCS       ENABLE WCS
M17.1 BSS 1         EXECUTE MACRO 
CLF03 CLF WCS       DISABLE WCS TO ALLOW EIG INSTR. 
      CPA .1        A-REG GET INCREMENTED 
      JMP T17.1     YES.GO CHECK B-REG
      SZA           NO.A-REG LEFT UNTOUCHED?
      JMP T17.6     NO
      SZB           IF FLOAT WAS EXEC. THEN WCS NOT ENABLED 
      CPB .M1       B-REG LEFT UNTOUCHED? 
      JMP T17.2     YES 
T17.6 JSB ERR36     NO
      JMP ENDIS,I   CAN'T GO ON 
T17.2 JSB ERREE     WCS NOT ENABLED 
      JMP ENDIS,I   CAN'T GO ON 
T17.1 CPB .M1       B-REG OK? 
      JMP T17.3     YES.GO TRY TO DISABLE WCS 
      SZB,RSS       NO.B-REG ZEROED OUT?
      JMP T17.2     YES.WCS NOT ENABLED 
      JSB ERR36     NO
      JMP ENDIS,I   CAN'T GO ON 
T17.3 CLA           ARRANGE 
      CCB            REGISTERS
M17.2 BSS 1         EXECUTE MACRO 
      SZA,RSS       A-REG=0?
      JMP T17.4     YES.GO CHECK B-REG
      CPA .1        NO.DID WCS RESPOND? 
      JMP T17.5     YES 
      JSB ERR36     NO
      JMP ENDIS,I   CAN'T GO ON 
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