R"Ɖ k" #5 k" 3 XXl#n@&ETEO+VAX 11/785 CPU Cluster Exerciser - ZZ-ETKAX     >UUVЏ"UV~h VnXnpn('VV(ڏ3xnXDEFAULT POWER_FAILALLCONSOLERX01+3>BJKA785g ~: *** HALT TESTS ARE EXECUTED ON THE FIRST PASS ONLY *** +!UB) Program will abort - FATAL ERROR(S)!/ [Aborted - 1st pass only] [Aborted - NO OPERATOR]Accelerator ReservedAccelerator Control/Status9!UBB) Actual Processor Status Longword = !XL(X)!/ ; !AC!/)AP expected = !XL(X), received = !XL(X)!/ AST Level @ETKAX.CMD Is the Auto Start switch OFF?4!/Expected = !XB(X) Actual = !XB(X) XOR = !XB(X)!/.XFC instruction improperly caused an exception:0) The wrong mode was found in the PSL for the power !AC!/70) The Interrupt Stack was not used for the power !AC!/ Bad Checksum SubtestP!/Byte # Expected(O) Received(O) XOR(O)!/------ ----------- ----------- ------!/the buffer page. &reading a nonexistent memory location.Cancel commandattempt to exeute a CHM: instruction with vector service on the Interrupt Stack.EKSU[>> Error(s) occured with a CHM!AC instruction!/ with the SCB vector entry <1:0> not = 0:!/ D>> Error(s) occured with a CHM!AC instruction with the PSL=1:!/ >!UB) CHM!AC instruction executed instead of causing a halt.!/attempt to exeute a CHM' instruction with the PSL IS bit set.?CHM ERRATo continue from the console mode, do the following:!/!/>>>!AC!AC:To continue from the console mode, do the following: >>>CPU Error status*CS parity error occured during entry/exit.D register contents?CPU DBLE-ERR HLTG>> Error(s) occured during the attempt to cause a Double Error HALT:!/ 2Deleted Data Detected bit <6> in RXES not set!Double Error HALT in Kernel Mode. D/G F 100DONE bit <5> failed to set Done bit not set after unit initdown sequence.*Failed to access the Error Status RegisterExecutive Stack pointerA!/Expected: !OW(O)!/Received: !OW(O)!/Bit tested: !UB(D)!/U!/Expected Status = 001000(O) ; Function Completed!/Received Status = !OW(O) ; !AC  !OB !OB !OB !OB!/Exception Program Counter$Exception Processor Status Longword +!UB) Test instruction failed to execute.!/+Exiting subtest - further testing invalid!/;!UBA) Expected Processor Status Longword = !XL(X) ; !AC!/+ Is the floppy in the console RX01 scratch/!/Test !ZW had !ZL hard error!%s, !AS run time.)FP expected = !XL(X), received = !XL(X)!/nFloating point accelerator type does not match type in P table, or IPR 28 (ID=17) is not operating properly.,!UB) Register Expected Actual XOR!/,Good Restart Parameter Block [RPB] Subtest!/:>> Error(s) occured with a macro code HALT instruction:!/ HALT INST EXECUTED2 >>>C HALT is expected when power is restored >>>C HALT is expected NOW: HALTED AT 9 HALT expected with following printout: !AC!AC!XL!/ ?Error(s) occured during the attempted halt of the processor: HALT instruction in Kernel ModeInterval Clock Control/StatusInterval Count ?ILL I/E VEC?INT-STK INVLDM>> Error(s) occured while trying to cause an Interrupt Stack Invalid HALT:!/ !/Test #0, Subtest #0, !AC!AC!ACInterrupt Priority LevelInterrupt Stack InvalidInterrupt Stack pointer7Interrupt Stack Pointer points to non-existent memory.M!UB) Interrupt Stack Pointer is incorrect:!/ Expected = !XL!/ Actual = !XL!/@!UB) Interrupt Stack Pointer:!/ Expected = ???!/ Actual = !XL!/invalid vector HALT.Kernel Stack pointerJ!UB) Kernel Stack Pointer is incorrect:!/ Expected = !XL!/ Actual = !XL!/=!UB) Kernel Stack Pointer:!/ Expected = ???!/ Actual = !XL!/Length of logout stack!XL(X) !XL(X) !XL(X) ; !AC!/$!XL(X) !XL(X) ; !AC!/6!/Turn off the MAIN breaker switch to power fail NOW!/Microprogram Breakpoint1!UB) Attempted to cause a Machine Check by !AC!/k!/!UB) Error in Machine Check logout stack:!/!/ Actual: Expected: XOR: Description:!/pExpected Reserved Operand Fault did not occur during an MFPR on an IPR when a READ was supposed to be illegal.jUnexpected Reserved Operand Fault occured during an MFPR on an IPR when a READ was supposed to be legal.Memory Management EnableR This subtest will restart itself if the RPB is found and properly interpreted. qExpected Reserved Operand Fault did not occur during an MTPR on an IPR when a WRITE was supposed to be illegal.kUnexpected Reserved Operand Fault occured during an MTPR on an IPR when a WRITE was supposed to be legal.Next Interval CountF!UB) No Access Violation occured on reference to non-existent memory.cDS> couldn't allocate buffer space!/ successfully for the summary report - exiting summary routineFunction did not complete2!UB) Restart flag was not set while restarting.!/%Not on Interrupt Stack as expected. 6!UB) Test instruction was not ready to be executed.!/ !AC !XL !XL!/atrying to access non-existent memory with the Interrupt Stack pointing to nonexistent memory. P0 Base P0 LengthP1 Base P1 Length on page 0. ParityProcess Control Block BasePerformance Monitor'Unable to set the proper protection !AC pointing to a protected page. Protocol Error indicationPSL = !XL(X) ; !AC!/0) Power down did not complete!/To run any of the power fail subtests properly, the Console Floppy MUST be!/inserted, and the AUTO RESTART switch MUST be in the ON position.!/!/CAUTION: Do NOT simulate a power fail by using the Memory!/or CPU Power Supply breakers.!/!/*Error(s) occured in power down/up sequence+R5 was cound to contain the incorrect valueFill/Empty sector data error(s)Read Sector commandRead Status Register command/ Register Addressed = !XB(X) ; !AC register!/@ Register Addressed = !XL(X) ; Reserved (not legal) register!/+R!UB expected = !XL(X), received = !XL(X)!/(!/Register power restoration errors:!/!//Is the AUTO RESTART switch in the off position?,!/Bad RPB at 0, Good RPB at 40000(X) SubtestReserved (not legal)Console Receive Control/StatusConsole Receive Data Buffer SBI ErrorSBI Fault/StatusSBI MaintenanceSBI Quadword ClearSBI SiloSBI Silo comparatorSBI Timeout Address_>> Error(s) occured with a non-existent memory access with the SCB vector entry <1:0> = 3: System BaseSystem Control Block Base*Unable to access all 32 sectors - aborting!/Sector: !ZB!/Track: !ZB  Search for Good RPBSystem IdentificationSoftware Interrupt RequestSoftware Interrupt Summary System LengthC!UB) Stack Pointer is incorrect:!/ Expected = !XL!/ Actual = !XL!/!UB) Stack Pointer = !XL!//!ACD SP !XL!/>>>D PSL 041F0000!/>>>D/G F 100!ACSummary parameterSupervisor Stack pointerTranslation Buffer Check TB Error 0 TB Error 1!Translation buffer Invalidate All$Translation buffer Invalidate Single,!UB) Unexpected interval timer interrupt.!/-Timer routine failed to set timer - aborting.Timeout address Time of DayTrapped Micro Program CounterConsole Transmit Control/StatusConsole Transmit Data BufferUnknown command up sequenceUser Stack pointerVirtual AddressThe following printout SHOULD appear:!/!/ CPU HALTED,SOMM CLEAR,STEP=NONE,CLOCK=NORM!/ RAD=HEX,ADD=PHYS,DAT=LONG,FILL=00,REL=00000000!/ INIT SEQ DONE!/ HALTED AT 00000000!/!/ (RELOADING WCS)!/ LOAD DONE, xxxx MICROWORDS LOADED!/ VER: PCS=xx-xx WCS=xx-U CON=Vxx-xx-C!/ (AUTO-RESTART)!/ CPU HALTED!/ INIT SEQ DONE [form feed]!/ ATTEMPTING WARM RESTART [form feed]!/!/ (Next Subtest/End-Of-Pass message)!/!/{!/IT IS THE USER'S RESPONSIBILITY TO VERIFY THAT THE PRINTOUT ABOVE!/MATCHES THE PRINTOUT DURING RECOVERY FROM POWERFAIL.!/Writeable Control Store AddressWriteable Control Store Data3R5 data - Expected = !XL Actual = !XL XOR = !XL!/%executing out of WCS with bad parity.Write Sector command-Error on write function of the console floppy!Write Deleted Data Sector command+writing to a nonexistent memory location.!!UB) Unexpected XFC exception.!/3XFC entry in SCB went into memory instead of WCS.  !AC !XL !XL !XL!/&&& & DHL@ RǏRSSS Pߟr#S'RR#rR IşP RRbԟ؟xŸٟl HH H$HLL L$LNN N$NRR R$RVV$V(VZZZZ\\\\^^,^0^``` `bbb bfff f""""3333DDDDUUUUffffwwwwR0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10R11AP FP @CM,TP,,,FPD,IS,CUR=2@,PRV=2@,,IPL=5^X,,,,,,,,,DV,FU,IV,T,N,Z,V,C' '*'5'KERNEL EXECUTIVE SUPERVISORUSER?/ 3?q?? 3]  S 2m-KMw9$ !+! AJ^.;MWl@U@UߟvDߟ ;h@S)CC1ߟCߟ=8PnX RXSA/RXTA Registers TestT+C$ߟVfߟCߟ 1(0 PP!PC(C,CB< VCC0 C)CCߟvDߟ 1[,CCߟCߟ1h1xTCC,CBC< V0 C)CCߟvDߟ 1[)CCߟCߟ1)BB1CC}C~C< V0[ C(CCߟvDߟ h[(CCߟCߟ9C1ߟDߟ?kf@C1К8њ0 PP!PCC,CB< VC0w C)CCߟvDߟ 1[)CCߟCߟ1TLC(C (C1WCC,CB< V0 C)CCߟvDߟ 1[)CCߟCߟ1)BB1CC}< VC~C00 C(CCߟvDߟ l[(CCߟCߟ=C1ߟDߟ?h@LC1ﭘ8PnX1 ATTACH The CPU must be attached. Example: ATTACH KA785 SBI KA0 Y/N Y/N 1FFF 0/1 1 HELP This program is a level 3 diagnostic that tests most portions of the VAX 11/785 CPU cluster hardware that are not specified by the VAX architecture. The areas tested by this program are reserved processor registers, power fail, processor halts, WCS, Machine Checks, and the RX01. This program MUST run in a standalone environment under control of the Diagnostic Supervisor. THIS PROGRAM IS NOT DESIGNED TO RUN WITH MEMORY MANAGEMENT ON. 1 SECTION 2 DEFAULT This section executes the Internal Processor Register tests, the HALT tests (executed on the first pass ONLY), the Writable Control Store (WCS) test and the Machine Check Exceptions and Interrupts test. 2 POWER_FAIL This section executes the Power Fail test. THE CPU MUST HAVE BATTERY BACKUP FOR THIS MANUAL INTERVENTION TEST TO EXECUTE PROPERLY. 2 RX01 This section executes the RXCS and Track/Sector exerciser test. The test prompts you to install a scratch floppy in the Console RX01. 2 ALL This section executes ALL tests in all sections. 1 EVENT Event flags are not used in this diagnostic. 1 QUICK The QUICK flag is not implemented in this diagnostic. 1 SUMMARY The summary report gives an error count by test number. No report is generated if there were no errors.