# 2.11BSD#431 - /usr/src/sys/vaxif/if_dereg.h

##### Macros

    CMD_BOOT          X
    CMD_GETCMD        X
    CMD_GETPCBB       X
    CMD_NOOP          X
    CMD_PDMD          X
    CMD_RSTT          X
    CMD_START         X
    CMD_STEST         X
    CMD_STOP          X
    CMD_TMRF          X
    CMD_TMRO          X
    FC_DUMPMEM        X
    FC_LOADMEM        X
    FC_LSUADDR        X
    FC_NOOP           X
    FC_RCCNTS         X
    FC_RCSTATUS       X
    FC_RDCNTS         X
    FC_RDDEFAULT      X
    FC_RDMODE         X
    FC_RDMULTI        X
    FC_RDPHYAD        X
    FC_RDRING         X
    FC_RDSERAD        X
    FC_RDSTATUS       X
    FC_RDSYSID        X
    FC_WTMODE         X
    FC_WTMULTI        X
    FC_WTPHYAD        X
    FC_WTRING         X
    FC_WTSERAD        X
    FC_WTSYSID        X
    MOD_DMNT          X
    MOD_DRDC          X
    MOD_DTCR          X
    MOD_ECT           X
    MOD_ENAL          X
    MOD_HDX           X
    MOD_LOOP          X
    MOD_PROM          X
    MOD_TPAD          X
    PCSR0_BITS        X
    PCSR0_CMASK       X
    PCSR0_DNI         X
    PCSR0_FATI        X
    PCSR0_INTE        X
    PCSR0_INTR        X
    PCSR0_PCEI        X
    PCSR0_RCBI        X
    PCSR0_RSET        X
    PCSR0_RXI         X
    PCSR0_SERI        X
    PCSR0_TXI         X
    PCSR1_BITS        X
    PCSR1_ICAB        X
    PCSR1_ILLINT      X
    PCSR1_PCTO        X
    PCSR1_POWER       X
    PCSR1_RMTC        X
    PCSR1_STCODE      X
    PCSR1_STMASK      X
    PCSR1_TIMEOUT     X
    PCSR1_XPWR        X
    RERR_BITS         X
    RERR_BUFL         X
    RERR_MLEN         X
    RERR_NCHN         X
    RERR_UBTO         X
    RFLG_BITS         X
    RFLG_CRC          X
    RFLG_ENP          X
    RFLG_ERRS         X
    RFLG_FRAM         X
    RFLG_OFLO         X
    RFLG_OWN          X
    RFLG_STP          X
    STAT_NIHALT       X
    STAT_NIUHALT      X
    STAT_PRIMLD       X
    STAT_READY        X
    STAT_RESET        X
    STAT_RUN          X
    STAT_UHALT        X
    XERR_BITS         X
    XERR_BUFL         X
    XERR_LCAR         X
    XERR_RTRY         X
    XERR_TDR          X
    XERR_UBTO         X
    XFLG_BITS         X
    XFLG_DEF          X
    XFLG_ENP          X
    XFLG_ERRS         X
    XFLG_MORE         X
    XFLG_MTCH         X
    XFLG_ONE          X
    XFLG_OWN          X
    XFLG_STP          X
    pchigh            X
    pclow             X
    pcsr0             X
    r_lenerr          X

##### struct's

    de_buf            X
    de_pcbb           X
    de_ring           X
    de_udbbuf         X
    dedevice          X

       1: /*
       2:  * Copyright (c) 1982, 1986 Regents of the University of California.
       3:  * All rights reserved.  The Berkeley software License Agreement
       4:  * specifies the terms and conditions for redistribution.
       5:  *
       6:  *	@(#)if_dereg.h	7.1 (Berkeley) 6/5/86
       7:  */
       8:
       9: /*
      10:  * DEC DEUNA interface
      11:  */
      12: struct dedevice {
      13:     union {
      14:         short   p0_w;
      15:         char    p0_b[2];
      16:     } u_p0;
      17: #define pcsr0   u_p0.p0_w
      18: #define pclow       u_p0.p0_b[0]
      19: #define pchigh      u_p0.p0_b[1]
      20:     short   pcsr1;
      21:     short   pcsr2;
      22:     short   pcsr3;
      23: };
      24:
      25: /*
      26:  * PCSR 0 bit descriptions
      27:  */
      28: #define PCSR0_SERI  0x8000      /* Status error interrupt */
      29: #define PCSR0_PCEI  0x4000      /* Port command error interrupt */
      30: #define PCSR0_RXI   0x2000      /* Receive done interrupt */
      31: #define PCSR0_TXI   0x1000      /* Transmit done interrupt */
      32: #define PCSR0_DNI   0x0800      /* Done interrupt */
      33: #define PCSR0_RCBI  0x0400      /* Receive buffer unavail intrpt */
      34: #define PCSR0_FATI  0x0100      /* Fatal error interrupt */
      35: #define PCSR0_INTR  0x0080      /* Interrupt summary */
      36: #define PCSR0_INTE  0x0040      /* Interrupt enable */
      37: #define PCSR0_RSET  0x0020      /* DEUNA reset */
      38: #define PCSR0_CMASK 0x000f      /* command mask */
      39:
      40: #define PCSR0_BITS  "\20\20SERI\17PCEI\16RXI\15TXI\14DNI\13RCBI\11FATI\10INTR\7INTE\6RSET"
      41:
      42: /* bits 0-3 are for the PORT_COMMAND */
      43: #define CMD_NOOP    0x0
      44: #define CMD_GETPCBB 0x1     /* Get PCB Block */
      45: #define CMD_GETCMD  0x2     /* Execute command in PCB */
      46: #define CMD_STEST   0x3     /* Self test mode */
      47: #define CMD_START   0x4     /* Reset xmit and receive ring ptrs */
      48: #define CMD_BOOT    0x5     /* Boot DEUNA */
      49: #define CMD_PDMD    0x8     /* Polling demand */
      50: #define CMD_TMRO    0x9     /* Sanity timer on */
      51: #define CMD_TMRF    0xa     /* Sanity timer off */
      52: #define CMD_RSTT    0xb     /* Reset sanity timer */
      53: #define CMD_STOP    0xf     /* Suspend operation */
      54:
      55: /*
      56:  * PCSR 1 bit descriptions
      57:  */
      58: #define PCSR1_XPWR  0x8000      /* Transceiver power BAD */
      59: #define PCSR1_ICAB  0x4000      /* Interconnect cabling BAD */
      60: #define PCSR1_STCODE    0x3f00      /* Self test error code */
      61: #define PCSR1_PCTO  0x0080      /* Port command timed out */
      62: #define PCSR1_ILLINT    0x0040      /* Illegal interrupt */
      63: #define PCSR1_TIMEOUT   0x0020      /* Timeout */
      64: #define PCSR1_POWER 0x0010      /* Power fail */
      65: #define PCSR1_RMTC  0x0008      /* Remote console reserved */
      66: #define PCSR1_STMASK    0x0007      /* State */
      67:
      68: /* bit 0-3 are for STATE */
      69: #define STAT_RESET  0x0
      70: #define STAT_PRIMLD 0x1     /* Primary load */
      71: #define STAT_READY  0x2
      72: #define STAT_RUN    0x3
      73: #define STAT_UHALT  0x5     /* UNIBUS halted */
      74: #define STAT_NIHALT 0x6     /* NI halted */
      75: #define STAT_NIUHALT    0x7     /* NI and UNIBUS Halted */
      76:
      77: #define PCSR1_BITS  "\20\20XPWR\17ICAB\10PCTO\7ILLINT\6TIMEOUT\5POWER\4RMTC"
      78:
      79: /*
      80:  * Port Control Block Base
      81:  */
      82: struct de_pcbb {
      83:     short   pcbb0;      /* function */
      84:     short   pcbb2;      /* command specific */
      85:     short   pcbb4;
      86:     short   pcbb6;
      87: };
      88:
      89: /* PCBB function codes */
      90: #define FC_NOOP     0x00        /* NO-OP */
      91: #define FC_LSUADDR  0x01        /* Load and start microaddress */
      92: #define FC_RDDEFAULT    0x02        /* Read default physical address */
      93: #define FC_RDPHYAD  0x04        /* Read physical address */
      94: #define FC_WTPHYAD  0x05        /* Write physical address */
      95: #define FC_RDMULTI  0x06        /* Read multicast address list */
      96: #define FC_WTMULTI  0x07        /* Read multicast address list */
      97: #define FC_RDRING   0x08        /* Read ring format */
      98: #define FC_WTRING   0x09        /* Write ring format */
      99: #define FC_RDCNTS   0x0a        /* Read counters */
     100: #define FC_RCCNTS   0x0b        /* Read and clear counters */
     101: #define FC_RDMODE   0x0c        /* Read mode */
     102: #define FC_WTMODE   0x0d        /* Write mode */
     103: #define FC_RDSTATUS 0x0e        /* Read port status */
     104: #define FC_RCSTATUS 0x0f        /* Read and clear port status */
     105: #define FC_DUMPMEM  0x10        /* Dump internal memory */
     106: #define FC_LOADMEM  0x11        /* Load internal memory */
     107: #define FC_RDSYSID  0x12        /* Read system ID parameters */
     108: #define FC_WTSYSID  0x13        /* Write system ID parameters */
     109: #define FC_RDSERAD  0x14        /* Read load server address */
     110: #define FC_WTSERAD  0x15        /* Write load server address */
     111:
     112: /*
     113:  * Unibus Data Block Base (UDBB) for ring buffers
     114:  */
     115: struct de_udbbuf {
     116:     short   b_tdrbl;    /* Transmit desc ring base low 16 bits */
     117:     char    b_tdrbh;    /* Transmit desc ring base high 2 bits */
     118:     char    b_telen;    /* Length of each transmit entry */
     119:     short   b_trlen;    /* Number of entries in the XMIT desc ring */
     120:     short   b_rdrbl;    /* Receive desc ring base low 16 bits */
     121:     char    b_rdrbh;    /* Receive desc ring base high 2 bits */
     122:     char    b_relen;    /* Length of each receive entry */
     123:     short   b_rrlen;    /* Number of entries in the RECV desc ring */
     124: };
     125:
     126: /*
     127:  * Transmit/Receive Ring Entry
     128:  */
     129: struct de_ring {
     130:     short   r_slen;         /* Segment length */
     131:     short   r_segbl;        /* Segment address (low 16 bits) */
     132:     char    r_segbh;        /* Segment address (hi 2 bits) */
     133:     u_char  r_flags;        /* Status flags */
     134:     u_short r_tdrerr;       /* Errors */
     135: #define r_lenerr    r_tdrerr
     136:     short   r_rid;          /* Request ID */
     137: };
     138:
     139: #define XFLG_OWN    0x80        /* If 0 then owned by driver */
     140: #define XFLG_ERRS   0x40        /* Error summary */
     141: #define XFLG_MTCH   0x20        /* Address match on xmit request */
     142: #define XFLG_MORE   0x10        /* More than one entry required */
     143: #define XFLG_ONE    0x08        /* One collision encountered */
     144: #define XFLG_DEF    0x04        /* Transmit deferred */
     145: #define XFLG_STP    0x02        /* Start of packet */
     146: #define XFLG_ENP    0x01        /* End of packet */
     147:
     148: #define XFLG_BITS   "\10\10OWN\7ERRS\6MTCH\5MORE\4ONE\3DEF\2STP\1ENP"
     149:
     150: #define XERR_BUFL   0x8000      /* Buffer length error */
     151: #define XERR_UBTO   0x4000      /* UNIBUS tiemout
     152: #define	XERR_LCOL	0x1000		/* Late collision */
     153: #define XERR_LCAR   0x0800      /* Loss of carrier */
     154: #define XERR_RTRY   0x0400      /* Failed after 16 retries */
     155: #define XERR_TDR    0x03ff      /* TDR value */
     156:
     157: #define XERR_BITS   "\20\20BUFL\17UBTO\15LCOL\14LCAR\13RTRY"
     158:
     159: #define RFLG_OWN    0x80        /* If 0 then owned by driver */
     160: #define RFLG_ERRS   0x40        /* Error summary */
     161: #define RFLG_FRAM   0x20        /* Framing error */
     162: #define RFLG_OFLO   0x10        /* Message overflow */
     163: #define RFLG_CRC    0x08        /* CRC error */
     164: #define RFLG_STP    0x02        /* Start of packet */
     165: #define RFLG_ENP    0x01        /* End of packet */
     166:
     167: #define RFLG_BITS   "\10\10OWN\7ERRS\6FRAM\5OFLO\4CRC\2STP\1ENP"
     168:
     169: #define RERR_BUFL   0x8000      /* Buffer length error */
     170: #define RERR_UBTO   0x4000      /* UNIBUS tiemout */
     171: #define RERR_NCHN   0x2000      /* No data chaining */
     172: #define RERR_MLEN   0x0fff      /* Message length */
     173:
     174: #define RERR_BITS   "\20\20BUFL\17UBTO\16NCHN"
     175:
     176: /* mode description bits */
     177: #define MOD_HDX     0x0001      /* Half duplex mode */
     178: #define MOD_LOOP    0x0004      /* Enable internal loopback */
     179: #define MOD_DTCR    0x0008      /* Disables CRC generation */
     180: #define MOD_DMNT    0x0200      /* Disable maintenance features */
     181: #define MOD_ECT     0x0400      /* Enable collision test */
     182: #define MOD_TPAD    0x1000      /* Transmit message pad enable */
     183: #define MOD_DRDC    0x2000      /* Disable data chaining */
     184: #define MOD_ENAL    0x4000      /* Enable all multicast */
     185: #define MOD_PROM    0x8000      /* Enable promiscuous mode */
     186:
     187: struct  de_buf {
     188:     struct ether_header db_head;    /* header */
     189:     char    db_data[ETHERMTU];  /* packet data */
     190:     int db_crc;         /* CRC - on receive only */
     191: };

#### Defined struct's

de_buf defined in line 187; never used
de_pcbb defined in line 82; never used
de_ring defined in line 129; never used
de_udbbuf defined in line 115; never used
dedevice defined in line 12; never used

#### Defined macros

CMD_BOOT defined in line 48; never used
CMD_GETCMD defined in line 45; never used
CMD_GETPCBB defined in line 44; never used
CMD_NOOP defined in line 43; never used
CMD_PDMD defined in line 49; never used
CMD_RSTT defined in line 52; never used
CMD_START defined in line 47; never used
CMD_STEST defined in line 46; never used
CMD_STOP defined in line 53; never used
CMD_TMRF defined in line 51; never used
CMD_TMRO defined in line 50; never used
FC_DUMPMEM defined in line 105; never used
FC_LOADMEM defined in line 106; never used
FC_LSUADDR defined in line 91; never used
FC_NOOP defined in line 90; never used
FC_RCCNTS defined in line 100; never used
FC_RCSTATUS defined in line 104; never used
FC_RDCNTS defined in line 99; never used
FC_RDDEFAULT defined in line 92; never used
FC_RDMODE defined in line 101; never used
FC_RDMULTI defined in line 95; never used
FC_RDPHYAD defined in line 93; never used
FC_RDRING defined in line 97; never used
FC_RDSERAD defined in line 109; never used
FC_RDSTATUS defined in line 103; never used
FC_RDSYSID defined in line 107; never used
FC_WTMODE defined in line 102; never used
FC_WTMULTI defined in line 96; never used
FC_WTPHYAD defined in line 94; never used
FC_WTRING defined in line 98; never used
FC_WTSERAD defined in line 110; never used
FC_WTSYSID defined in line 108; never used
MOD_DMNT defined in line 180; never used
MOD_DRDC defined in line 183; never used
MOD_DTCR defined in line 179; never used
MOD_ECT defined in line 181; never used
MOD_ENAL defined in line 184; never used
MOD_HDX defined in line 177; never used
MOD_LOOP defined in line 178; never used
MOD_PROM defined in line 185; never used
MOD_TPAD defined in line 182; never used
PCSR0_BITS defined in line 40; never used
PCSR0_CMASK defined in line 38; never used
PCSR0_DNI defined in line 32; never used
PCSR0_FATI defined in line 34; never used
PCSR0_INTE defined in line 36; never used
PCSR0_INTR defined in line 35; never used
PCSR0_PCEI defined in line 29; never used
PCSR0_RCBI defined in line 33; never used
PCSR0_RSET defined in line 37; never used
PCSR0_RXI defined in line 30; never used
PCSR0_SERI defined in line 28; never used
PCSR0_TXI defined in line 31; never used
PCSR1_BITS defined in line 77; never used
PCSR1_ICAB defined in line 59; never used
PCSR1_ILLINT defined in line 62; never used
PCSR1_PCTO defined in line 61; never used
PCSR1_POWER defined in line 64; never used
PCSR1_RMTC defined in line 65; never used
PCSR1_STCODE defined in line 60; never used
PCSR1_STMASK defined in line 66; never used
PCSR1_TIMEOUT defined in line 63; never used
PCSR1_XPWR defined in line 58; never used
RERR_BITS defined in line 174; never used
RERR_BUFL defined in line 169; never used
RERR_MLEN defined in line 172; never used
RERR_NCHN defined in line 171; never used
RERR_UBTO defined in line 170; never used
RFLG_BITS defined in line 167; never used
RFLG_CRC defined in line 163; never used
RFLG_ENP defined in line 165; never used
RFLG_ERRS defined in line 160; never used
RFLG_FRAM defined in line 161; never used
RFLG_OFLO defined in line 162; never used
RFLG_OWN defined in line 159; never used
RFLG_STP defined in line 164; never used
STAT_NIHALT defined in line 74; never used
STAT_NIUHALT defined in line 75; never used
STAT_PRIMLD defined in line 70; never used
STAT_READY defined in line 71; never used
STAT_RESET defined in line 69; never used
STAT_RUN defined in line 72; never used
STAT_UHALT defined in line 73; never used
XERR_BITS defined in line 157; never used
XERR_BUFL defined in line 150; never used
XERR_LCAR defined in line 153; never used
XERR_RTRY defined in line 154; never used
XERR_TDR defined in line 155; never used
XERR_UBTO defined in line 151; never used
XFLG_BITS defined in line 148; never used
XFLG_DEF defined in line 144; never used
XFLG_ENP defined in line 146; never used
XFLG_ERRS defined in line 140; never used
XFLG_MORE defined in line 142; never used
XFLG_MTCH defined in line 141; never used
XFLG_ONE defined in line 143; never used
XFLG_OWN defined in line 139; never used
XFLG_STP defined in line 145; never used
pchigh defined in line 19; never used
pclow defined in line 18; never used
pcsr0 defined in line 17; never used
r_lenerr defined in line 135; never used

Last modified: 1986-06-05 Generated: 2016-12-26 | Generated by src2html V0.67 page hit count: 308 |