All these bootstraps (except paper tape) are designed to read in 512 bytes into locations 0-776, and then start program execution at 0. If you are having system problems, then it pays to have the bootstrap halt, so that you can check for error conditions in device registers. Also, check location 0, which is normally 240 for DEC bootstraps and 407 or 411 (separate I/D space) for Unix (unless it's a tight load, and the a.out header has been removed). Some DEC bootstraps refuse to load boot blocks that don't begin with 240. If you have doubts, load location 0 with 777 before you start the bootstrap.
Toggle in these programs starting at location 1000. To be safe, load a trap catcher into the following locations, and if you get a halt at 6 or 12, check the program or missing device. If it halts at 26, then you have power supply problems. If the CPU loops on location 0 (can show as location 2 on CPUs with data displays) then the bootblock wasn't loaded.
Location Contents Comment ======================================= 000000 000777 Loop at location zero if 000002 000000 secondary bootstrap isn't loaded 000004 000006 Bus error 000006 000000 000010 000012 Reserved instruction 000012 000000 000024 000026 Power failure 000026 000000
Loc. Cont. Label Instruction Comment ================================================ xx7744 016701 mov device,r1 get csr address xx7746 000026 xx7750 012702 loop: mov #offset,r2 get offset xx7752 000352 offset: xx7754 005211 inc (r1) read frame xx7756 105711 wait: tstb (r1) wait for ready xx7760 100376 bpl wait xx7762 116162 movb (r1),bnk(r2) store data xx7764 000002 xx7766 xx7400 xx7770 005267 inc offset bump address xx7772 177756 xx7774 000765 br loop xx7776 177550 device: HSR csr, or 177560 for teletype Where xx Memory Size =========================== 017744 4k 037744 8K 057744 12K 077744 16k 117744 20k 137744 24k 157744 28k
Loc. Cont. Instruction Comment ======================================= 001000 012700 mov #rkwc, r0 controller address 001002 177406 001004 012710 mov #-256,(r0) set the word count 001006 177400 001010 012740 mov #5,-(r0) read command 001012 000005 001014 105710 tstb (r0) wait for ready 001016 100376 bpl .-2 001020 000000 halt (or 005007 to auto start)
Loc. Cont. Instruction Comment ======================================= 001000 012737 mov #unit,rkda set the unit address 001002 000000 unit 0 020000 unit 1 040000 unit 2 060000 unit 3 001004 177412 001006 012700 mov #rkwc, r0 controller address 001010 177406 001012 012710 mov #-256,(r0) set the word count 001014 177400 001016 012740 mov #5,-(r0) read command 001020 000005 001022 105710 tstb (r0) wait for ready 001024 100376 bpl .-2 001026 000000 halt (or 005007 to auto start)
Loc. Cont. Instruction Comment ======================================= 001000 012700 mov #rkcs1,r0 controller register 001002 177440 001004 012710 mov #cmd,(r0) 001006 000003 001010 032710 bit #flags,(r0) wait for ready or error 001012 100200 001014 001775 beq .-4 001016 012760 mov #-256,2(r0) set the word count 001020 177400 001022 000002 001024 012710 mov #cmd,(r0) read block 001026 000021 001030 032710 bit #flags,(r0) wait for ready or error 001032 100200 001034 001775 beq .-4 001036 000000 halt (or 5007 for auto start)
Loc. Cont. Instruction Comment ======================================= 001000 012700 mov #rkcs1,r0 controller register 001002 177440 001004 012710 mov #cmd,(r0) 001006 002003 001010 032710 bit #flags,(r0) wait for ready or error 001012 100200 001014 001775 beq .-4 001016 012760 mov #-256,2(r0) set the word count 001020 177400 001022 000002 001024 012710 mov #cmd,(r0) read block 001026 000021 001030 032710 bit #flags,(r0) wait for ready or error 001032 100200 001034 001775 beq .-4 001036 000000 halt (or 5007 for auto start)
Loc. Cont. Instruction Comment ======================================= 001000 012700 mov #rlcs,r0 controller address 001002 174400 001004 012760 mov #cmd,4(r0) seek command data 001006 000013 001010 000004 001012 012710 mov #cmd,(r0) get status 001014 000004 001016 105710 tstb (r0) wait ready 001020 100376 bpl .-2 001022 005060 clr 2(r0) zero bus address 001024 000002 001026 005060 clr 4(r0) zero disk address 001030 000004 001032 012760 mov #-256,6(r0) set the byte count 001034 177400 001036 000006 001040 012710 mov #cmd,(r0) read block 001042 000014 001044 105710 tstb (r0) wait ready 001046 100376 bpl .-2 001050 000000 halt (or 5007 to auto start)
Loc. Cont. Instruction Comment ======================================= 001000 012700 mov #rpwc, r0 controller address 001002 176726 001004 005040 clr -(r0) clear disk address 001006 005040 clr -(r0) clear cylinder address 001010 005040 clr -(r0) clear bus address 001012 012740 mov #-256,-(r0) set work count for 512 bytes 001014 177400 001016 012740 mov #cmd,-(r0) read block 001020 000005 001022 105710 tstb (r0) wait ready 001024 100376 bpl .-2 001026 00000 halt (or 5007 for auto start)
Loc. Cont. Instruction Comment ======================================= 001000 012700 mov #tcwc control register address 001002 177344 001004 012710 mov #-256,(r0) set word count for 512 bytes 001006 177400 001010 012740 mov #4002,-(r0) find position 001012 004002 001014 005710 tst (r0) wait for ready 001016 100376 br .-2 001020 012710 mov #3,(r0) read block 0 001022 000003 001024 105710 tstb (r0) wait for ready 001026 100376 bpl .-2 001030 012710 mov #5,(r0) stop tape 001032 000005 001034 105710 tstb (r0) wait for ready 001036 100376 bpl .-2 001040 000000 halt (or 5007 to auto start)
Loc. Cont. Instruction Comment ======================================= 010000 012700 mov #mtbrc,r0 controller address 010002 172524 010004 005310 dec (r0) set to -1 010006 012740 mov #cmd,-(r0) high density, skip block 010010 060011 010012 105710 tstb (r0) wait ready 010014 100376 bpl .-2 010016 005710 tst (r0) test for error 010020 100767 bpl start try again on error 010022 012710 mov #cmd,(r0) read block 010024 060003 010026 105710 tstb (r0) wait ready 010030 100376 bpl .-2 010032 005710 tst (r0) test for error 010034 100777 bpl . loop for ever on error 010036 000000 halt (or 5007 to auto start)