$$RSX=0	;SOME RSX
$RSXMM=0	;RSX11M MAPPED
MSX11D=0	;DEFINE FOR OMITTING DEBUG TRACE OF TRAP INSTRUCTIONS
$VMEM=0	;ALLOW FULL 22BIT ADDRESSING
	.GLOBL	D.S,D.CT,D.BRK
	.IF	DF,$FORM$
	.GLOBL	D.FFPC
	.ENDC
MV3.2=0
MMV3.2=0
$D$FPU=0
$FOP$=0