Help on various CSR values can be found by typing HELP CSR keyword, where
 keyword is one of
			CACHE/45
			DEANZA
			DISKS
			DR-11K
			MAGTAPE
			R7912
			TERMINALS
			TTn:
2	DISKS
 
	Sorry, not yet implemented
2	MAGTAPE
 
	So sorry, not yet implemented
2	R7912
     THE FOLLOWING COMMENTS ARE TO DEFINE THE FUNCTIONS OF THE STATUS 
     REGISTERS AND TO DEFINE THE FORMAT OF THE R7912 DATA WORD

  COMMAND REGISTER ADRESS 16X0D2
          X = 4-7 WHICH GROUP OF 8 DEVICES
          D = 0-7 WHICH DEVICE
     COMMAND WORD--BITS 0-12 ONLY
       (X=0, CLEAR THE FUNCTION; X=1, ENABLE THE FUNCTION)
	12000	LOAD R7912 MEMORY(REPETITIVE SWEEP)
	 20X2	INHIBIT KPO(KNOB) OUTPUT
	 20X3	SELECT CHANNEL 1
	 20X4	SELECT DOT GRATICULE
	 20X5	SELECT DIGITAL MODE
	 20X6	SELECT REMOTE CHANNEL MODE
	 20X7	LOCK R7912 MEMORY
	 2020	READ STATUS WORD
	 2040	ARM SINGLE SWEEP
	 2100	READ DATA
	 4000	INITIALIZE R7912

  R7912 STATUS REGISTER  16X0D0
		X = 0-7 WHICH GROUP OF 8 DEVICES
		D IGNORED

	BIT 6    --  INTERUPT ENABLED(=1)/DISABLED(=0)
	BITS 3-5 --  DEVICE CAUSING INTERUPT
	BIT 0    --  INTERUPT PENDING(= 0 NO INTERUPT FROM DEVICES),
			             (= 1 INTERUPT FROM DEVICE OCCURED)

	R7912 DATA REGISTER ADRESS 16X0D4

 BIT 15	=0	THE LAST DATA VALUE HAS NOT BEEN REACHED
	=1	THE LOW ORDER BITS CONTAIN THE DATA VALUE

 BIT 14	=0	THE LOW ORDER BITS(0-8) CONTAIN A DATA VALUE
	=1	THE LOW ORDER BITS(0-6) CONTAIN A KRO CHARACTER
		(KNOB READ OUT)

 BIT 13	=0	R7912 NOT BUSY
	=1	R7912 IS BUSY

 BIT  9	=0	THE DATA VALUE IS A VERTICAL POSITION
 		=1	THE DATA VALUE IS A HORIZONTAL POSITION

 BITS 0-8	0-511 VERTICAL OR HORIZONTAL DATA VALUE

 BITS 0-6	ASCII CHARACTER FROM KNOB READOUT
 
2	DEANZA

	So sorry, not yet implemented
2	DR-11K
 
	CONTROL CSR	767770
	INPUT		767772
	OUTPUT		767774
2	TERMINALS
 
	TT:	  CSR	VECTOR
	 0	777560	   60
	 1	775610	  300
	 2	775620	  310
	 3	775630	  320
	 4	775640	  410
	 5	775650	  420
	 6	775660	  430
	 7	775670	  440
	10	775700	  450
	11	775710	  460
2	TT0:
	CSR = 777560	VEC = 60
2	TT1:
	CSR = 775610	VEC = 300
2	TT2:
	CSR = 775620	VEC = 310
2	TT3:
	CSR = 775630	VEC = 320
2	TT4:
	CSR = 775640	VEC = 410
2	TT5:
	CSR = 775650	VEC = 420
2	TT6:
	CSR = 775660	VEC = 430
2	TT7:
	CSR = 775670	VEC = 440
2	TT10:
	CSR = 775700	VEC = 450
2	TT11:
	CSR = 775710	VEC = 460
2	CACHE/45
 
	CSR 	= 765006   (ONLY BIT 1 IS R/W)  NON-STANDARD BUT DOES
			    NOT CONFLICT WITH BOOTSTRAP.
	BIT 1	= 0 -- cache enabled
	BIT 1	= 1 -- cache disabled