.TITLE ^^DCP CAMAC OPERATIONS\\ .PAPER SIZE 44,72 .CENTER ^^^&DCP CAMAC OPERATIONS\&\\ .SPACING 1 .SKIP .SUBTITLE ^^INTRODUCTION\\ ^^A. ^&INTRODUCTION\&\\ .PARAGRAPH ^THE ^^CAMAC\\ HARDWARE CONFIGURATION FOR WHICH THE ^DATA ^COLLECTION ^PROGRAM (^^DCP\\) WAS DESIGNED CONSISTS OF TWO MICRO-PROGRAMMABLE BRANCH DRIVERS .INDEX BRANCH HIGHWAY .INDEX CRATE (^^MBD\\'S), EACH CONNECTED TO A ^^CAMAC\\ BRANCH HIGHWAY SYSTEM (A THIRD ^M^B^D EXISTS AS A SPARE). ^THE ^^MBD\\'S ARE 16-BIT MICROPROCESSORS WITH 16 BASIC HARDWARE INSTRUCTIONS AND 16 ADDITIONAL CONTROL INSTRUCTIONS; 112 VERY HIGH SPEED .INDEX FILE REGISTERS (33 NS ACCESS TIME) GENERAL PURPOSE "FILE" REGISTERS AND 18 CONTROL REGISTERS; A FAST (70 NS CYCLE TIME) SOLID STATE MEMORY (1024, 2048, OR 4096 WORDS); AND INTERFACE LOGIC TO GIVE THE ^^MBD\\ COMPLETE CONTROL OVER THE TWO BUSSES TO WHICH IT IS CONNECTED: THE ^^CAMAC\\ BRANCH HIGHWAY .INDEX ^^UNIBUS\\ AND THE ^^PDP-11 UNIBUS\\. ^INSTRUCTION EXECUTION TIME OF THE ^^MBD\\ IS 350 NS. ^^CAMAC\\ COMMANDS CAN BE PERFORMED AT A MAXIMUM RATE OF ONE PER MICROSECOND. ^THE ^^MBD\\ CAN ACCESS ANY OF THE 128^K WORD ^^UNIBUS\\ ADDRESSES VIA A DIRECT MEMORY ACCESS (^^DMA\\) CHANNEL WITHOUT DISTURBING THE ^^PDP-11 CPU\\ BY USING THE NON-PROCESSOR REQUEST LINE (^^NPR\\), WHICH HAS THE HIGHEST PRIORITY OF ALL ^^UNIBUS\\ REQUESTS. ^AN ^^NPR\\ DEVICE CAN GAIN BUS CONTROL IN 3.5 MICROSECONDS AND TRANSFER DATA AT MEMORY SPEEDS (ONE 16-BIT WORD EACH 850 NS FOR CORE, 450 NS FOR ^^MOS\\) BY HOLDING BUS CONTROL. (^IT IS NECESSARY HOWEVER TO RELEASE BUS CONTROL EVERY FEW MICROSECONDS TO AVOID INTERFERING WITH OTHER SIMULTANEOUS TRANSFERS ON THE ^^UNIBUS\\, E.G., TO .INDEX CHANNEL OR FROM DISKS). ^EACH ^^MBD\\ HAS 8 CHANNELS (0 TO 7) ARRANGED IN A PRIORITY SEQUENCE. .INDEX ^^LAM\\ ^EACH CHANNEL IS ASSOCIATED WITH A PARTICULAR ^^LAM\\ SOURCE ON THE ^^CAMAC\\ BRANCH, AND HAS ITS OWN SET OF 14 FILE REGISTERS WHICH ARE AUTOMATICALLY ENABLED WHEN A CHANNEL BEGINS EXECUTING AND DISABLED WHEN THE CHANNEL EXITS. ^ALTHOUGH ONLY ONE CHANNEL CAN EXECUTE AT A TIME, REQUESTS FOR .INDEX CHANNEL INITIATION CHANNEL EXECUTION (WHICH CAN COME FROM THE ^^CAMAC\\ BRANCH VIA A ^^LAM\\ OR THE ^^PDP\\-11 VIA A CHANNEL START) .INDEX CHANNEL PRIORITY ARE AUTOMATICALLY SERVICED IN PRIORITY SEQUENCE BY THE ^^MBD\\ HARDWARE. ^THUS EFFECTIVELY EACH OF THE EIGHT ^^MBD\\ CHANNELS CAN BE SIMULTANEOUSLY TRANSFERING DATA BETWEEN THE ^^CAMAC\\ BRANCH AND SEPARATE ^^PDP\\-11 BUFFER AREAS. .PARAGRAPH ^THE SOFTWARE WHICH HAS BEEN WRITTEN FOR THE ^^MBD\\'S UNDER THE ^^RSX\\ OPERATING .INDEX ^^MBD\\ HANDLER SYSTEM CONSISTS OF AN ^^MBD\\ ^I/^O HANDLER TASK (DEVICE NAME "^B^D") WHICH CAN .INDEX ^^QIO\\ SUPPORT SIMLULTANEOUS INPUT-OUTPUT VIA ^^RSX QIO\\ (QUEUE ^I/^O) DIRECTIVES ON 16 ^^MBD\\ CHANNELS (MAXIMUM) DISTRIBUTED AMONG ANY NUMBER OF SEPARATE .INDEX ^^MBD\\ EXECUTIVE ^^MBD\\'S; AND AN ^^MBD\\ EXECUTIVE ROUTINE ABOUT 1.2^K WORDS LONG WHICH CONTAINS .INDEX FUNCTION ROUTINES AN INTERPRETER AND ROUTINES TO EXECUTE VARIOUS ^^MBD\\ FUNCTIONS. ^IN .INDEX CHANNEL PROGRAM ORDER TO PERFORM A SEQUENCE OF ^^CAMAC\\ OPERATIONS, A ^&CHANNEL PROGRAM\& IS CONSTRUCTED IN EITHER ^^PDP\\-11 MEMORY OR ^^MBD\\ MEMORY. ^A ^^QIO\\ DIRECTIVE IS THEN ISSUED TO DEVICE "^B^D" AND THE UNIT NUMBER (0 TO 17 OCTAL) .INDEX CHANNEL CORRESPONDING TO THE ^^MBD\\ AND CHANNEL WHICH IS TO EXECUTE THE CHANNEL .INDEX ^^PDP\\ BUFFER PROGRAM. ^THE ^^RSX\\ ^I/^O HANDLER PASSES THE ADDRESS OF THE ^^PDP\\-11 BUFFER .INDEX CHANNEL INITIATION FOR THE OPERATION TO THE SELECTED ^^MBD\\ AND STARTS THE SPECIFIED CHANNEL. ^THE ^^MBD\\ EXECUTIVE DETERMINES THE LOCATION OF THE CHANNEL PROGRAM IN ^^MBD\\ .INDEX CHANNEL INSTRUCTIONS OR ^^PDP\\ MEMORY AND INTERPRETS SUCCESSIVE INSTRUCTIONS IN THE CHANNEL PROGRAM BY DISPATCHING TO APPROPRIATE FUNCTION ROUTINES. ^WHEN A .INDEX CHANNEL STOP .INDEX COMPLETION CODE CHANNEL ^^STOP\\ INSTRUCTION IS INTERPRETED, A COMPLETION CODE AND PROCESSED .INDEX WORD COUNT .INDEX ERROR INFORMATION WORD WORD COUNT OR ERROR INFORMATION WORD IS RETURNED TO THE ^^RSX\\ ^I/^O HANDLER, .INDEX ^I/^O STATUS BLOCK WHICH IN TURN PASSES THEM BACK TO THE ORIGINATING PROGRAM VIA THE ^I/^O STATUS BLOCK SPECIFIED IN THE ^^QIO\\ DIRECTIVE. ^UP TO 16 ^^MBD\\ CHANNEL PROGRAMS CAN BE EXECUTING SIMLULTANEOUSLY IN THE TWO ^^MBD\\'S. .SUBTITLE ^^THE MBD DEVICE HANDLER FOR RSX\\ .PAGE .INDEX ^^MBD\\ HANDLER ^^B. ^&THE MBD DEVICE HANDLER FOR RSX\&\\ .PARAGRAPH ^THE ^^RSX\\ ^I/^O HANDLER FOR THE ^^MBD\\'S IS A PRIVILEGED TASK; I.E., ITS VIRTUAL ADDRESS SPACE INCLUDES READ/WRITE ACCESS TO THE ^^RSX\\ EXECUTIVE SYSTEM COMMUNICATION AREA (^^SCOM\\) AND NODE POOL, AS WELL AS THE ^^PDP\\-11 EXTERNAL PAGE (THE TOP 4^K ^^UNIBUS\\ ADDRESSES WHICH ARE ASSIGNED TO PERIPHERAL DEVICES). ^EACH OF THE 16 UNIT NUMBERS (0 TO 17 OCTAL) SUPPORTED BY THIS .INDEX ^^PUD\\ HANDLER MUST HAVE A CORRESPONDING ^^PUD\\ ENTRY (PHYSICAL UNIT DIRECTORY) IN THE ^^RSX\\ EXECUTIVE CREATED AT ^^SYSGEN\\ TIME (HOWEVER, ANY OF THE 16 UNITS WHICH ARE NOT NEEDED CAN BE OMITTED FROM THE ^^PUD\\). ^THE ^^PUD\\ ENTRY FOR A PARTICULAR UNIT SPECIFIES THE ^^MBD\\ DEVICE ADDRESS IN THE EXTERNAL PAGE (WHICH IDENTIFIES THE PARTICULAR ^^MBD\\), THE CHANNEL NUMBER OF THAT ^^MBD\\ (0 TO 7), THE MEMORY SIZE OF THE ^^MBD\\ (4096 WORDS FOR OUR ^M^B^D'S), .INDEX INTERRUPT THE INTERRUPT VECTOR ADDRESS FOR THE GIVEN CHANNEL, AND THE LOW-ORDER 8 BITS OF THE ^PROCESSOR ^STATUS ^WORD TO BE LOADED WHEN AN INTERRUPT OCCURS: BITS 7-5 ARE THE PRIORITY (5 .INDEX ^^UNIBUS\\ SINCE THE ^^MBD\\'S INTERRUPT ON THE ^^UNIBUS BR5\\ LINE). .PARAGRAPH .INDEX ^^QIO\\ ^THE FOLLOWING ^^QIO\\ FUNCTIONS ARE SUPPORTED BY THE ^^MBD\\ HANDLER: .LEFT MARGIN 8 .INDENT -8 .SKIP ^^IO.ATT\\:#ATTACHES THE ^^MBD\\ UNIT SPECIFIED TO THE CALLER TASK. ^CAUSES THE HANDLER TO DE-QUEUE ONLY ^I/^O REQUESTS FOR THE SPECIFIED UNIT ISSUED BY THE ATTACHING TASK OR THE ^^RSX\\ EXECUTIVE. ^I/^O REQUESTS FROM OTHER TASKS MAY BE QUEUED BUT WILL NOT BE PROCESSED UNTIL THE UNIT IS DETACHED. .INDENT -8 .SKIP ^^IO.DET\\:#DETACHES THE ^^MBD\\ UNIT SPECIFIED FROM THE CALLING TASK, PERMITTING ^I/^O REQUESTS FROM OTHER TASKS TO BE PROCESSED. .INDENT -8 .SKIP ^^IO.WLB\\:#LOADS THE SPECIFIED ^^MBD\\ CONTROL MEMORY WITH A PROGRAM .INDEX ^^MBD\\ EXECUTIVE (USUALLY, THE ^^MBD\\ EXECUTIVE) USING SINGLE INSTRUCTION MODE AND PREPARES THE ^^MBD\\ FOR RUN MODE. .INDENT -8 .SKIP .INDEX CHANNEL INITIATION ^^IO.RLB\\:#ACTIVATES AN ^^MBD\\ CHANNEL, PASSING IT THE ADDRESS AND LENGTH .INDEX ^^PDP\\ BUFFER OF A BUFFER IN ^^PDP\\-11 MEMORY. .INDENT -8 .SKIP ^^IO.KIL\\:#CANCELS ALL REQUESTS FOR A GIVEN ^^MBD\\ UNIT MADE BY THE CALLING TASK, WHETHER IN PROGRESS OR QUEUED. .INDENT -8 .SKIP ^^IO.RDN\\:#CAUSES ^I/^O RUNDOWN: ALL REQUESTS FOR A GIVEN ^^MBD\\ UNIT MADE BY A SPECIFIED TASK ARE ABORTED. (^THIS REQUEST MUST ORIGINATE FROM THE ^^RSX\\ EXECUTIVE, NOT A USER TASK). .INDENT -8 .SKIP ^^IO.UNL\\:#CAUSES THE HANDLER TO EXIT AFTER ALL OUTSTANDING ^I/^O REQUESTS HAVE COMPLETED. (^THIS REQUEST, WHICH ORIGINATES FROM THE ^^RSX\\ EXECUTIVE, IS ISSUED WHEN AN ^^MCR\\ "^^UNLOAD BD:\\" COMMAND IS GIVEN). .LEFT MARGIN 0 .PARAGRAPH ^A "WRITE" REQUEST (^^IO.WLB\\) REQUIRES TWO PARAMETERS: .SKIP .LEFT MARGIN 4 .INDENT -4 (1) ^STARTING ADDRESS OF THE ^^MBD\\ LOAD IMAGE (IN THE USER'S VIRTUAL TASK ADDRESS SPACE). .SKIP .INDENT -4 (2) ^SIZE (IN BYTES) OF THE ^^MBD\\ LOAD IMAGE. .SKIP .LEFT MARGIN 0 ^THE FIRST WORD OF THE LOAD IMAGE MUST BE THE STARTING ADDRESS IN THE ^^MBD\\ MEMORY FOR THE LOADED PROGRAM. ^THE SECOND WORD MUST BE THE NUMBER OF WORDS TO LOAD INTO ^^MBD\\ MEMORY. ^THE THIRD TO LAST WORDS OF THE LOAD IMAGE SHOULD BE INSTRUCTIONS TO BE LOADED INTO THE ^^MBD\\. ^THE LOAD IMAGE BUFFER MAY BE AT ANY PHYSICAL ^^PDP\\-11 ADDRESS BUT CANNOT EXCEED 8132 BYTES IN LENGTH (SINCE ONLY ONE ^ACTIVE ^PAGE ^REGISTER IS USED BY THE HANDLER TASK FOR MAPPING PART OF ITS VIRTUAL ADDRESS SPACE INTO THE CALLING TASK'S MEMORY). ^THE HANDLER CHECKS THAT THE SECOND WORD OF THE BUFFER (NUMBER OF WORDS TO LOAD) CORRESPONDS WITH THE LOAD IMAGE SIZE SPECIFIED IN THE ^^QIO\\ DIRECTIVE; IF NOT, A FATAL ERROR IS SIGNALLED AND NO LOADING TAKES PLACE (THIS AFFORDS A DEGREE OF PROTECTION AGAINST WRITING A CORRUPTED LOAD IMAGE INTO THE ^^MBD\\). ^IF THERE ARE ANY CHANNELS ACTIVE ON THE ^^MBD\\ TO BE LOADED, THE LOAD IS NOT PERFORMED AND A FATAL ERROR CODE IS RETURNED. ^THE HANDLER ALSO VERIFIES THE DATA LOADED BY READING IT BACK AFTER LOADING. ^IF A DISCREPANCY IS FOUND, A FATAL .INDEX ^I/^O STATUS BLOCK ERROR CODE IS RETURNED AND THE SECOND WORD OF THE ^I/^O STATUS BLOCK SPECIFIED IN THE ^^QIO\\ CONTAINS THE NUMBER OF BYTES SUCCESFULLY LOADED, FROM WHICH THE FAILING ^^MBD\\ ADDRESS CAN BE CALCULATED. .PARAGRAPH ^A "CHANNEL RUN" REQUEST (^^IO.RLB\\) REQUIRES TWO PARAMETERS: .SKIP .LEFT MARGIN 4 .INDENT -4 .INDEX ^^PDP\\ BUFFER (1) ^STARTING ADDRESS OF A ^^PDP\\-11 BUFFER (IN THE USER'S VIRTUAL TASK ADDRESS SPACE). .SKIP .INDENT -4 (2) ^SIZE (IN BYTES) OF THE BUFFER. .SKIP .LEFT MARGIN 0 ^THE CONTENTS OF THE BUFFER AND THE DIRECTION OF TRANSFER (IN OR OUT) ARE A FUNCTION ONLY OF THE ^^MBD\\ CHANNEL PROGRAM WHICH IS EXECUTED. ^THE MAXIMUM BUFFER SIZE IS 32,765 WORDS. .PARAGRAPH ^IN ORDER TO PASS CONTROL DATA TO AND FROM THE ^^MBD\\ CHANNEL ON .INDEX BUFFER HEADER INITIALIZATION AND COMPLETION, THE TWO WORDS BEFORE THE USER-SPECIFIED BUFFER ARE USED. ^THE CALLING TASK MUST THEREFORE INSURE THAT THESE WORDS ARE (1) WITHIN ITS VIRTUAL ADDRESS SPACE; (2) NOT MODIFIED, EXAMINED, EXECUTED, OR OTHERWISE TAMPERED WITH WHILE THE ^^MBD\\ CHANNEL IS ACTIVE (FROM ^^QIO\\ TIME TO ^I/^O COMPLETION). ^TO PROVIDE PSEUDO- TRANSPARENCY, THE CONTENTS OF THESE TWO WORDS ARE SAVED INSIDE THE ^^MBD\\ HANDLER BEFORE STARTING THE ^^MBD\\ CHANNEL, AND RESTORED AFTER THE CHANNEL .INDEX INTERRUPT INTERRUPT OCCURS. ^HOWEVER, IF AN ERROR OCCURS WHILE RESTORING THE TWO WORDS, THE ERROR .INDEX ^I/^O STATUS BLOCK CODE ^^IE.OVR\\ WILL BE RETURNED TO THE ^I/^O STATUS BLOCK, AND THE USER ON SEEING THIS CODE SHOULD EXPECT THAT THE TWO WORDS PRECEEDING HIS BUFFER WERE CLOBBERED. .PARAGRAPH .INDEX EXTENDED ADDRESSING ^SINCE THE MEMORY ADDRESS REGISTER (^^MAR\\) OF THE ^^MBD\\ CONTAINS A 16-BIT WORD (NOT BYTE) ADDRESS, IT CAN REPRESENT ANY OF 64^K WORDS. ^FURTHERMORE, A CHOICE CAN BE MADE (VIA THE "^^RST17\\" AND "^^SET17\\" ^^MBD\\ CONTROL INSTRUCTIONS) WHETHER AN ^^MBD\\ WILL OPERATE ON AN UPPER OR LOWER 64^K MEMORY BANK (I.E., THE ^A17 ADDRESS BIT ON OR OFF). ^HOWEVER, THE CHOICE APPLIES TO ALL EXECUTING CHANNELS ON THAT ^^MBD\\ AND MUST BE FIXED BEFORE ANY CHANNELS ARE STARTED. ^HENCE THE HANDLER CHECKS THAT THE HIGH ORDER BIT (^A17) OF THE USER'S BUFFER ADDRESS IN PHYSICAL MEMORY MATCHES THE CURRENT SETTING OF THE ^^MBD\\ CHOSEN TO EXECUTE A CHANNEL PROGRAM. ^IF IT DOES NOT, THE HANDLER VERIFIES THAT NO CHANNELS ARE ACTIVE ON THAT ^^MBD\\, AND SETS OR RESETS ^A17 AS NEEDED (USING SINGLE INSTRUCTION MODE) BEFORE STARTING THE CHANNEL. ^IF OTHER CHANNELS ARE ACTIVE, HOWEVER, A FATAL ERROR IS SIGNALLED AND THE CHANNEL IS NOT STARTED (THE USER MAY TRY AGAIN LATER). ^IN ANY CASE, .INDEX BUFFER HEADER THE USER'S BUFFER (INCLUDING THE TWO HEADER WORDS IN FRONT) MUST ALWAYS BE ENTIRELY WITHIN EITHER THE UPPER OR LOWER 64^K MEMORY BANK; BUFFERS CROSSING THE BOUNDARY ARE NOT ALLOWED. .PARAGRAPH ^BEFORE STARTING THE ^^MBD\\ CHANNEL, THE HANDLER CONVERTS THE VIRTUAL BUFFER ADDRESS TO A PHYSICAL WORD ADDRESS (BITS ^A16-^A01) AND SUBTRACTS .INDEX BUFFER HEADER TWO TO ACCOUNT FOR THE TWO WORD BUFFER HEADER; THE RESULTING ADDRESS IS LOADED INTO THE ^^MBD\\'S ^^PDX\\ REGISTER (A SPECIAL PURPOSE ^^MBD\\ REGISTER WHICH IS ACCESSIBLE BOTH BY THE ^^PDP\\-11 AND THE MICROPROCESSOR, WHICH IS USED FOR INTER-PROCESSOR COMMUNICATION). ^AFTER SAVING THE TWO BUFFER HEADER WORDS, IT PUTS THE WORD COUNT (I.E., HALF THE BYTE COUNT SUPPLIED IN THE ^^QIO\\, NOT INCLUDING THE TWO HEADER WORDS) INTO THE .INDEX COMPLETION CODE FIRST HEADER WORD, AND A DEFAULT COMPLETION CODE OF ^^IE.ONP\\ INTO THE SECOND HEADER WORD. ^THIS SUPPLIES ALL THE INFORMATION NEEDED BY THE ^^MBD\\ EXECUTIVE ROUTINE TO LOCATE THE ^^PDP\\-11 BUFFER. .INDEX CHANNEL STOP ^AT THE END OF THE CHANNEL'S OPERATION, THE ^^MBD\\ EXECUTIVE WRITES A COMPLETION CODE INTO THE SECOND HEADER WORD (^^IS.SUC\\ = +1 FOR A SUCCESSFUL TRANSFER, OTHER POSITIVE VALUES FOR NON-FATAL ERRORS, NEGATIVE VALUES .INDEX WORD COUNT FOR FATAL ERRORS), AND THE ACTUAL WORD COUNT FOR THE TRANSFER (IF THE .INDEX ERROR INFORMATION WORD COMPLETION CODE IS POSITIVE) OR AN ERROR INFORMATION WORD (IF NEGATIVE) .INDEX INTERRUPT INTO THE FIRST HEADER WORD, THEN INTERRUPTS THE ^^PDP\\-11. ^THE HANDLER THEN PUTS TWICE THE RETURNED WORD COUNT FROM THE FIRST HEADER WORD (I.E., A BYTE COUNT) OR THE ERROR INFORMATION WORD INTO THE SECOND WORD .INDEX ^I/^O STATUS BLOCK OF THE ^I/^O STATUS BLOCK, AND THE LOW ORDER EIGHT BITS OF THE RETURNED COMPLETION CODE FROM THE SECOND HEADER WORD INTO THE FIRST BYTE OF THE ^I/^O STATUS BLOCK. ^AFTER RESTORING THE ORIGINAL CONTENTS OF THE BUFFER HEADER WORDS, THE HANDLER SIGNALS ^I/^O COMPLETION (SETS THE EVENT FLAG SPECIFIED IN THE ^^QIO\\ DIRECTIVE, QUEUES AN ^ASYNCHRONOUS ^SYSTEM ^TRAP ROUTINE FOR EXECUTION IF SPECIFIED, DECLARES A SIGNIFICANT EVENT TO WAKE UP THE CALLING TASK IF QUIESCENT, AND PERFORMS OTHER NECESSARY CLEAN-UP ACTIONS). ^NOTE THAT IF THE ^^MBD\\ EXECUTIVE DOES NOT OVERWRITE THE COMPLETION CODE IN THE SECOND HEADER WORD, THE ^^IE.ONP\\ ERROR CODE WILL BE RETURNED TO THE CALLING TASK. .PARAGRAPH ^AN "^I/^O KILL" REQUEST (^^IO.KIL\\) REQUIRES NO PARAMETERS. "^I/^O RUNDOWN" (^^IO.RDN\\) REQUIRES THE TASK NAME IDENTIFYING THE TASK WHOSE ^I/^O REQUESTS ARE TO BE ABORTED. ^BOTH ARE EXECUTED BY THE ^^MBD\\ HANDLER IN A SIMILAR FASHION. ^THE ^I/^O REQUEST QUEUE IS SEARCHED FOR REQUESTS MADE BY THE GIVEN TASK FOR THE GIVEN ^^MBD\\ UNIT; ALL SUCH REQUESTS ARE FLUSHED .INDEX ^I/^O STATUS BLOCK FROM THE QUEUE AND A CODE ^^IE.ABO\\ IS RETURNED TO THEIR ^I/^O STATUS STATUS BLOCKS. ^IF A CHANNEL HAS ALREADY BEEN STARTED BY AN "^^IO.RLB\\" REQUEST AND HAS NOT YET INTERRUPTED, A VALUE OF 177777 (MINUS ONE) IS LOADED INTO THE ^^MBD\\'S .INDEX ABORT REQUEST ^^PDX\\ AND THE CHANNNEL IS STARTED; THE ^^MBD\\ EXECUTIVE RECOGNIZES THE ABORT REQUEST FROM A NORMAL REQUEST BY THE ^^PDX\\ VALUE, AND BEGINS INTERPRETING THE CHANNEL PROGRAM FOR THAT CHANNEL AT A SPECIAL .INDEX ABORT ENTRY ABORT ENTRY POINT (THIS PROVIDES AN OPPORTUNITY FOR THE CHANNEL PROGRAM TO CLEAN UP ANY ^^CAMAC\\ OPERATIONS IN PROGRESS, SUCH AS BY DISABLING ^^LAM\\ SOURCES, STOPPING A ^^DVM\\ SCANNER, ETC., AS APPROPRIATE). .PARAGRAPH .INDEX NORMAL ENTRY ^IN GENERAL, THEN, EACH ^^MBD\\ CHANNEL PROGRAM SHOULD HAVE A PRIMARY ENTRY POINT, WHICH CLEARS MODULES, ENABLES .INDEX ^^LAM\\ ^^LAM\\ SOURCES IF APPROPRIATE, WAITS FOR A ^^LAM\\, READS OUT DATA, DISABLES .INDEX ABORT ENTRY ^^LAM\\ SOURCES, AND STOPS; AND AN ABORT ENTRY POINT, WHICH DISABLES ^^LAM\\'S AND EXITS. ^THE ^^MBD\\ EXECUTIVE MAINTAINS A LIST OF NORMAL AND ABORT ENTRY POINTS FOR EACH CHANNEL AND ALWAYS BEGINS INTERPRETING CHANNEL INSTRUCTIONS AT THE APPROPRIATE PLACE. .PARAGRAPH .INDEX CHANNEL INITIATION ^WHEN INITIATING A CHANNEL, THE ^^MBD\\ HANDLER WAITS UP TO 12 MILLISECONDS FOR THE READY BIT IN THE ^^CSR\\ (CONTROL AND STATUS REGISTER) OF THE ^^MBD\\ TO COME ON; IF IT REMAINS OFF FOR THIS PERIOD, THE HANDLER ASSUMES THAT THE ^^MBD\\ PROGRAM HAS ENTERED AN INFINITE LOOP AND THEREFORE EXECUTES A RESET ^^MBD\\ FUNCTION, KILLING ALL ACTIVE CHANNELS ON THAT ^^MBD\\. ^IT RETURNS AN ^I/^O STATUS BLOCK ERROR CODE ^^IE.FHE\\ FOR ALL CHANNELS THUS ABORTED, THEN RETRIES THE CHANNEL INITIATE. ^A TASK WHICH ISSUES AN ^^MBD\\ CHANNEL EXECUTE REQUEST AND LATER OBTAINS AN ^^IE.FHE\\ ERROR SHOULD THEREFORE ASSUME THAT THE OPERATION WAS TERMINATED FOR REASONS BEYOND ITS CONTROL, AND RE-ISSUE THE ^^QIO\\. ^SINCE THE TERMINATION MAY HAVE OCCURED IN THE MIDDLE OF A DATA READOUT SEQUENCE, WITH SOME MODULES READ AND OTHERS NOT, AN ^^MBD\\ CHANNEL PROGRAM SHOULD IF POSSIBLE BEGIN BY CLEARING MODULES BEFORE ENABLING AND WAITING FOR A ^^LAM\\. .PARAGRAPH ^THE HANDLER WILL RETRY CHANNEL INITIATION IN THE ABOVE FASHION A MAXIMUM OF 5 TIMES; IF THE ^^MBD\\ READY BIT IS STILL NOT ON, A FATAL ERROR CODE (^^IE.DNR\\ = DEVICE NOT READY) WILL BE RETURNED. .PARAGRAPH ^THE ^^MBD\\ HANDLER KEEPS TRACK OF WHICH ^^MBD\\ CHANNELS HAVE BEEN USED SO FAR AND WHICH HAVE NOT. ^WHEN A REQUEST IS MADE FOR A PARTICULAR CHANNEL, IF THE CHANNEL HAS NOT PREVIOUSLY BEEN ACTIVATED, A REQUEST IS MADE TO .INDEX CONNECT TO INTERRUPT THE ^^RSX\\ EXECUTIVE TO CONNECT THE INTERRUPT VECTOR FOR THE CHANNEL TO THE .INDEX INTERRUPT SERVICE ROUTINE HANDLER'S ^^ILSR\\ (^INTERRUPT ^LEVEL ^SERVICE ^ROUTINE). ^THIS INVOLVES CLAIMING A NODE FROM THE SYSTEM NODE POOL AND FILLING IT WITH A CODE SEQUENCE WHICH IS POINTED TO BY THE INTERRUPT VECTOR AND EXECUTED (IN KERNEL MODE) WHEN AN INTERRUPT OCCURS. ^THIS CODE SEQUENCE SAVES THE KERNEL ^^ASR\\3 (^ACTIVE ^SEGMENT ^REGISTER 3) ON THE KERNEL STACK; SETS THE KERNEL ^^ASR\\3 TO THE PHYSICAL ADDRESS OF THE HANDLER TASK'S ^^ILSR\\ (MAPPING VIRTUAL ADDRESSES 60000-67777 INTO THE PROPER PHYSICAL ADDRESSES), CLEARS THE CORRESPONDING BUS ACTIVITY BIT IN THE ^I/^O BIT MAP (USED FOR SYSTEM ERROR LOGGING AS A MEANS OF MONITORING THE .INDEX ^^UNIBUS\\ TRAFFIC ON THE ^^UNIBUS\\ TO AID IN DIAGNOSING PERIPHERAL FAILURES DUE TO THE ^^UNIBUS\\ LOAD); SETS THE CONDITION CODE BITS "^C", "^V", "^Z", AND "^N" IN THE PROCESSOR STATUS WORD TO THE CODE WHICH UNIQUELY IDENTIFIES THE INTERRUPTING CHANNEL TO THE ^^ILSR\\; AND JUMPS TO THE ENTRY POINT OF THE ^^ILSR\\. ^IF THE CONNECT TO INTERRUPT PROCESS FAILS FOR SOME REASON, AN ERROR CODE ^^IE.CON\\ IS RETURNED TO THE CALLING TASK. ^NOTE THAT, ONCE CONNECTED TO ITS INTERRUPT VECTOR, A CHANNEL REMAINS CONNECTED UNTIL THE HANDLER IS UNLOADED. ^THIS MEANS THAT ONE NODE FROM THE ^^RSX\\ NODE POOL IS TIED UP CONTINUOUSLY FOR EACH CONNECTED CHANNEL, BUT THE TIME NECESSARY TO ESTABLISH CONNECTION IS NOT WASTED FOR EACH ^^CAMAC\\ TRANSACTION. .PARAGRAPH ^IN ADDITION TO THE 8 INTERRUPT VECTORS OF EACH ^^MBD\\ ASSOCIATED WITH CHANNEL INTERRUPTS, THERE ARE 16 VECTORS FOR EACH ^^MBD\\ ASSOCIATED DIRECTLY WITH ^^CAMAC LAM\\'S. ^THIS DIRECT INTERRUPT FACILITY IS ^&NOT\& SUPPORTED BY THE ^^MBD\\ ^I/^O HANDLER. ^IN ADDITION, EACH ^^MBD\\ HAS AN ERROR TRAP VECTOR WHICH IS ASSOCIATED WITH FATAL ERRORS ON EITHER OF THE TWO BUSSES: BRANCH TIMEOUT (I.E., ADDRESSING .INDEX CRATE .INDEX BRANCH HIGHWAY .INDEX ^^UNIBUS\\ A NON-EXISTANT CRATE) ON THE ^^CAMAC\\ BRANCH HIGHWAY, AND ^^UNIBUS\\ TIMEOUT (I.E., ADDRESSING NON-EXISTANT MEMORY) ON THE ^^PDP\\-11 BUS. ^THIS VECTOR IS ALSO ^&NOT\& CONNECTED BY THE ^^MBD\\ HANDLER. ^THUS AN INTERRUPT THROUGH THESE VECTORS SHOULD BE AVOIDED. ^IN PRACTICE, MOST OF THEM SHOULD NOT OCCUR, SINCE THE DIRECT GRADED-^^LAM\\ INTERRUPTS ARE MASKED OFF BY THE ^^MBD\\'S ^^MSK\\ REGISTER, AND THE ^^MBD\\ HANDLER VERIFIES ALL ^^PDP\\ BUFFER ADDRESSES FOR LEGALITY (WHICH INCLUDES EXISTANCE OF THE MEMORY) BEFORE STARTING THE ^^MBD\\. .SUBTITLE ^^THE MBD EXECUTIVE PROGRAM\\ .PAGE .INDEX ^^MBD\\ EXECUTIVE ^^C. ^&THE MBD EXECUTIVE PROGRAM\&\\ .PARAGRAPH ^THE ^^MBD\\ EXECUTIVE IS LOADED INTO EITHER OR BOTH OF THE TWO ^^MBD\\'S BY THE TASK WHICH DESIRES TO PERFORM ^^CAMAC\\ OPERATIONS USING THE HANDLER ^^IO.WLB\\ FUNCTION. ^THE EXECUTIVE CONSISTS OF AN INITIALIZATION ROUTINE AND DISPATCHER, .INDEX FUNCTION ROUTINES PLUS A LARGE NUMBER OF SPECIFIC FUNCTION ROUTINES. ^IT ALLOWS VARIOUS ^^MBD\\ CONTROL OPERATIONS AND ^^CAMAC\\ TRANSACTIONS TO BE EXECUTED BY SPECIFYING A NUMERIC FUNCTION CODE AND ANY NECESSARY ARGUMENTS .INDEX ^^FCNA\\ (SUCH AS ^^CAMAC FCNA\\'S --#FUNCTION, CRATE, STATION NUMBER, AND SUBADDRESS). ^A SEQUENCE OF SUCH REQUESTS IS EXECUTED BY A PARTICULAR .INDEX CHANNEL PROGRAM ^^MBD\\ CHANNEL AND IS CALLED A ^&CHANNEL PROGRAM\&. ^CHANNEL PROGRAMS MAY BE EXECUTED EITHER FROM ^^MBD\\ MEMORY (USED WHEN SPEED IS IMPORTANT) OR FROM ^^PDP\\ MEMORY, ALTHOUGH IN THE LATTER CASE NOT ALL FUNCTIONS ARE IMPLEMENTED. .PARAGRAPH .INDEX NORMAL ENTRY .INDEX ABORT ENTRY ^EACH ^^MBD\\ CHANNEL HAS ASSOCIATED WITH IT A NORMAL ENTRY AND AN ABORT ENTRY INTO AN ^&^^MBD\\-RESIDENT\& CHANNEL PROGRAM. ^AN ^^IO.RLB\\ REQUEST TO THE ^^RSX\\ ^I/^O HANDLER CAUSES THE ^^PDX\\ REGISTER TO BE LOADED WITH THE .INDEX BUFFER HEADER .INDEX ^^PDP\\ BUFFER WORD ADDRESS OF A 2 WORD BUFFER HEADER PRECEEDING THE ^^PDP\\-11 BUFFER. ^THE EXECUTIVE INITIALIZATION ROUTINE (WHICH STARTS IN ^^MBD\\ LOCATION 0001, THE ENTRY POINT FOR ^^PDP\\-STARTED CHANNEL OPERATIONS) READS THE WORD AT THAT ADDRESS FROM ^^PDP\\ MEMORY, WHICH CONTAINS THE LENGTH OF THE ^^PDP\\ BUFFER (IN WORDS). ^IT THEN INCREMENTS THE ADDRESS TO POINT TO THE WORD PRECEEDING THE ACTUAL BUFFER, AND COMPUTES AND SAVES THE ADDRESS OF THE LAST BUFFER WORD BY ADDING THE LENGTH. ^THESE QUANTITIES SERVE TO DEFINE THE LOWER AND UPPER LIMITS OF THE BUFFER. ^FINALLY THE CHANNEL NUMBER (^^CCL\\ REGISTER) IS USED TO INDEX A TABLE OF CHANNEL ENTRY POINTS (^^MBD\\ ADDRESSES), AND INTERPRETATION OF THE CHANNEL PROGRAM BEGINS AT ITS NORMAL ENTRY POINT. ^AN ^^IO.KIL\\ REQUEST TO THE ^^RSX\\ ^I/^O HANDLER CAUSES THE ^^PDX\\ REGISTER TO BE LOADED WITH A 177777, WHICH CAUSES THE EXECUTIVE INITIALIZATION ROUTINE TO LOOK UP THE ABORT ENTRY ADDRESS FOR THE CHANNEL AND BEGIN INTERPRETING THE CHANNEL PROGRAM AT THAT LOCATION. .PARAGRAPH ^AN ^^MBD\\-RESIDENT CHANNEL PROGRAM CAN CAUSE A ^^PDP\\-RESIDENT CHANNEL PROGRAM TO BE EXECUTED BY MEANS OF A ^^CM.EXP\\ INSTRUCTION; THE ^^PDP\\ CHANNEL PROGRAM CAN LATER RETURN CONTROL TO THE ^^MBD\\ PROGRAM BY A ^^CM.EXM\\ INSTRUCTION. ^SINCE A ^^PDP\\-RESIDENT CHANNEL PROGRAM IS IN THE BUFFER SPECIFIED BY THE ^^QIO\\, AND SINCE THIS SAME BUFFER IS ALSO USED BY SOME INSTRUCTIONS (E.G., ^^CAMAC\\ READS) AS A DESTINATION FOR ^^CAMAC\\ OR ^^MBD\\ DATA, THE RIGHT NUMBER OF WORDS MUST BE INSERTED BETWEEN SUCH INSTRUCTIONS TO ALLOW SPACE FOR STORING THE DATA. ^INSTRUCTIONS WHICH TRANSFER A VARIABLE AMOUNT .INDEX ^Q-STOP MODE OF DATA (E.G., ^^CAMAC\\ READS IN ^Q-STOP BLOCK TRANSFER MODE) ARE THUS FORBIDDEN TO ^^PDP\\-RESIDENT CHANNEL PROGRAMS. ^SINCE THE ^^PDP\\ CHANNEL PROGRAMS ARE LIKE SUBROUTINES CALLED BY AN ^^MBD\\ PROGRAM VIA THE ^^CM.EXP\\ INSTRUCTION (WHICH HAS NO ARGUMENTS), INSTRUCTIONS WHICH TAKE ^^MBD\\ ARGUMENTS (E.G., WRITE ^^MBD\\ TO ^^CAMAC\\) ARE ALSO FORBIDDEN TO ^^PDP\\-RESIDENT PROGRAMS (ALL ARGUMENTS MUST COME FROM THE ^^PDP\\ BUFFER). .PARAGRAPH ^THE ^^MBD\\ DISPATCHER AND FUNCTION ROUTINES CAN DETECT VARIOUS SOFTWARE AND HARDWARE ERROR CONDITIONS. ^CHANNEL PROGRAMS CAN SPECIFY THAT CONTROL BE TRANSFERRED TO A PARTICULAR POINT WHEN AN ERROR OCCURS BY EXECUTING A ^^CM.JPE\\ INSTRUCTION (JUMP ON ERROR). ^SINCE A ^^PDP\\ CHANNEL PROGRAM IS CALLED FROM AN ^^MBD\\ CHANNEL PROGRAM, BOTH A ^^PDP\\ AND AN ^^MBD\\ .INDEX ERROR EXIT ERROR EXIT ADDRESS CAN EXIST. ^IF BOTH HAVE BEEN SPECIFIED (THE ONE BY A ^^CM.JPE\\ EXECUTED FROM THE ^^MBD\\, THE OTHER BY A LATER ^^CM.JPE\\ EXECUTED FROM THE ^^PDP\\), THE ^^PDP\\ ERROR EXIT TAKES PRECEDENCE. ^WHEN AN ERROR .INDEX COMPLETION CODE .INDEX ERROR INFORMATION WORD OCCURS, A COMPLETION CODE AND ERROR INFORMATION WORD ARE STORED (PROVIDING INFORMATION ABOUT THE ERROR); IF A ^^PDP\\ ERROR EXIT EXISTS, CONTROL TRANSFERS TO THAT ADDRESS IN THE ^^PDP\\ BUFFER; IF NOT, AND AN ^^MBD\\ ERROR EXIT EXISTS, CONTROL TRANSFERS TO THAT ^^MBD\\ ADDRESS (THE ^^PDP\\ CHANNEL PROGRAM IS TERMINATED). ^IF NEITHER EXIST, A ^^CM.STP\\ .INDEX CHANNEL STOP INSTRUCTION IS EXECUTED, STOPPING THE CHANNEL. ^WHEN A ^^PDP\\ CHANNEL PROGRAM RETURNS VIA ^^CM.EXM\\ TO THE ^^MBD\\ PROGRAM, THE ^^PDP\\ ERROR EXIT IS CANCELLED. ^THE MAIN USE OF ERROR EXITS IS TO ALLOW A CHANNEL PROGRAM TO LEAVE THE ^^CAMAC\\ BRANCH IN AN ACCEPTABLE STATE BEFORE EXITING, SUCH .INDEX ^^LAM\\ AS BY CLEARING MODULES NOT READ OUT AND/OR DISABLING ^^LAM\\ SOURCES. .PARAGRAPH ^WHEN A CHANNEL STOPS (BY EXECUTING A ^^CM.STP\\ INSTRUCTION), THE ^^MBD\\ EXECUTIVE WRITES THE STORED COMPLETION CODE INTO THE SECOND WORD OF .INDEX BUFFER HEADER THE ^^PDP\\-11 BUFFER HEADER. ^IF IT IS NEGATIVE (FATAL ERROR), THE STORED ERROR INFORMATION WORD IS WRITTEN INTO THE FIRST HEADER WORD, BUT IF POSITIVE, THE CURRENT BUFFER ADDRESS MINUS THE INITIAL BUFFER ADDRESS .INDEX WORD COUNT (USUALLY, THE COUNT OF WORDS TRANSFERRED) IS WRITTEN INTO THE FIRST WORD OF THE BUFFER HEADER. .PARAGRAPH ^CHANNEL 7 OF EACH ^^MBD\\ (THE HIGHEST PRIORITY CHANNEL) IS RESERVED FOR .INDEX CONTROL CHANNEL USE AS A "CONTROL" CHANNEL, WHICH CONTAINS A ^^CM.EXP\\ INSTRUCTION FOLLOWED BY A ^^CM.STP\\ INSTRUCTION, SO IT CAN EXECUTE ^^PDP\\-RESIDENT CHANNEL PROGRAMS, INCLUDING PROGRAMS TO LOAD ^^MBD\\-RESIDENT CHANNEL PROGRAMS FOR THE OTHER 7 CHANNELS. .PARAGRAPH ^THE ^^MBD\\ EXECUTIVE INCLUDES A WORD WHICH CONTAINS THE MEMORY SIZE OF THE ^^MBD\\ IN WHICH IT RUNS. ^THIS WORD SHOULD BE SET TO THE PROPER VALUE BY THE TASK WHICH LOADS THE EXECUTIVE .INDEX ^^PUD\\ USING THE VALUE OBTAINED FROM THE ^^PUD\\ ENTRY FOR THE ^^MBD\\ VIA AN ^^RSX GLUN\\$ DIRECTIVE. ^THE EXECUTIVE OCCUPIES THE BOTTOM PART OF ^^MBD\\ MEMORY; THE SPACE FROM THE TOP OF THE EXECUTIVE TO THE END OF ^^MBD\\ MEMORY IS AVAILABLE FOR LOADING CHANNEL PROGRAMS (VIA THE ^^CM.LOD\\ INSTRUCTION). .PARAGRAPH ^BECAUSE THE ^^MBD\\ CAN ACCESS ANY OF THE 128^K WORDS OF ^^PDP\\-11 MEMORY, INCLUDING THE EXTERNAL PAGE, AND SINCE (BEING A PERIPHERAL DEVICE) THERE IS NO HARDWARE PROTECTION AGAINST WRITING INTO ANY AREA, IT IS POTENTIALLY A VERY HAZARDOUS DEVICE. ^IN ORDER TO PROTECT SYSTEM INTEGRITY, THE ^^MBD\\ EXECUTIVE VERIFIES BEFORE ANY .INDEX ^^PDP\\ BUFFER ^^PDP\\-11 READ OR WRITE IS PERFORMED THAT THE ADDRESS IS WITHIN THE BUFFER .INDEX ^^QIO\\ SPECIFIED BY THE ^^QIO\\. ^THE ^^MBD\\ EXECUTIVE ITSELF IS PROTECTED FROM OVERWRITING BY THE FACTS THAT (1) A LOAD ^^MBD\\ FUNCTION (^^IO.WLB\\) CANNOT BE PERFORMED WHILE CHANNELS ARE ACTIVE; (2) A CHANNEL PROGRAM LOAD INSTRUCTION (^^CM.LOD\\) WILL ONLY LOAD INTO THE AREA ABOVE THE EXECUTIVE AND BELOW THE TOP OF MEMORY (THE LATTER TO AVOID ADDRESS WRAP-AROUND); AND (3) THE ^^MBD\\ MEMORY DEPOSIT INSTRUCTION (^^CM.DEP\\) WILL ONLY DEPOSIT INTO LOCATIONS ABOVE THE EXECUTIVE AND BELOW THE TOP OF MEMORY. ^FINALLY, SINCE ALL CHANNEL PROGRAMS ARE INTERPRETED RATHER THAN EXECUTED, ACCIDENTAL TRANSFER OF CONTROL TO ^^PDP\\ WRITE INSTRUCTIONS OR DIRECT EXECUTION OF SUCH INSTRUCTIONS IS IMPOSSIBLE. ^THUS THE WORST THAT AN ERRONEOUS CHANNEL PROGRAM CAN DO IS TO DESTROY ITSELF OR OTHER CHANNEL PROGRAMS AND/OR THE CONTENTS OF THE ^^PDP\\-11 BUFFER (WHICH IS KNOWN TO BE IN A PROPER AREA OF MEMORY SINCE THE ^^MBD\\ ^I/^O HANDLER VALIDATES ALL BUFFER SPECIFICATIONS AS BEING READ/WRITE MEMORY AREAS WITHIN THE CALLING TASK'S ADDRESS SPACE). .PARAGRAPH .INDEX CHANNEL PRIORITY ^IN ORDER TO PROVIDE FREQUENT OPPORTUNITIES FOR HIGHER PRIORITY CHANNELS TO RUN IF READY, AN "^E^X1" INSTRUCTION IS EXECUTED BETWEEN EACH INTERPRETIVE INSTRUCTION FETCH. "^E^X1" CAUSES THE CHANNEL TO EXIT BUT SETS A BIT IN THE ^^PRL\\ (PROGRAM REQUEST LATCH) FIRST. ^WHEN NO HIGHER PRIORITY CHANNELS ARE ACTIVE OR REQUESTING SERVICE, THE ORIGINAL CHANNEL IS SELECTED AGAIN FOR EXECUTION. ^THIS ALSO IMPLIES THAT INFINITE LOOPS IN CHANNEL PROGRAMS WILL ONLY BLOCK EXECUTION OF THAT AND LOWER PRIORITY CHANNELS; HIGHER PRIORITY CHANNELS CAN CONTINUE TO EXECUTE. .PARAGRAPH ^WHENEVER GROUPS OF A FEW WORDS ARE TO BE TRANSFERRED TO OR FROM THE .INDEX ^^UNIBUS\\ ^^PDP\\ BUFFER, THE ^^MBD\\ FUNCTIONS GET AND HOLD ^^UNIBUS\\ CONTROL SO SUCCESSIVE WORDS IN THE GROUP CAN BE TRANSFERRED AT HIGHER SPEEDS; HOWEVER THE BUS IS NEVER HELD FOR MORE THAN 20 OR 30 ^^MBD\\ INSTRUCTIONS (7.0 TO 10.5 MICROSECONDS) TO AVOID INTERFERING WITH INTERLEAVED ^^UNIBUS\\ TRANSFERS TO DISK OR MAGTAPE DEVICES. ^FOR EXAMPLE, FOR 24-BIT ^^CAMAC\\ TRANSFERS (WHERE 2 ^^PDP\\-11 WORDS ARE TRANSFERRED FOR EACH ^^CAMAC\\ COMMAND), BUS CONTROL IS RELEASED AFTER EACH ^^CAMAC\\ COMMAND, I.E., AFTER EVERY OTHER BUS CYCLE. ^IF A FUNCTION IS TERMINATED BY AN ERROR CONDITION WHILE HOLDING BUS CONTROL, THE "^E^X1" INSTRUCTION EXECUTED BETWEEN INSTRUCTION FETCHES GUARANTEES THAT THE BUS WILL BE RELEASED. .PARAGRAPH .INDEX ^^LAM\\ ^THE WAIT FOR ^^LAM\\ INSTRUCTION ^^CM.LAM\\ CAUSES AN "^E^X2" INSTRUCTION TO BE EXECUTED. "^E^X2" CAUSES THE CHANNEL TO EXIT BUT SETS A BIT IN THE ^^CEL\\ (CHANNEL ENABLE LATCH), SO THAT WHEN A GRADED-^^LAM\\ BRANCH CYCLE IS EXECUTED (BECAUSE OF THE ^B^D, BRANCH DEMAND, LINE BEING ASSERTED BY AN ONLINE .INDEX CRATE CRATE CONTROLLER ON THE BRANCH), AND THE GRADED-^^LAM\\-WORD BIT .INDEX CHANNEL PRIORITY CORRESPONDING TO THAT CHANNEL IS ON, AND NO HIGHER PRIORITY CHANNELS ARE ACTIVE OR REQUESTING SERVICE, THE CHANNEL IS AGAIN EXECUTED BY THE MICROPROCESSOR. .SUBTITLE ^^AVAILABLE CHANNEL PROGRAM INSTRUCTIONS\\ .PAGE .INDEX CHANNEL INSTRUCTIONS ^^D. ^&AVAILABLE CHANNEL PROGRAM INSTRUCTIONS\&\\ .PARAGRAPH ^A CHANNEL PROGRAM IS A SET OF CHANNEL INSTRUCTIONS AND ASSOCIATED ARGUMENTS. ^EACH CHANNEL INSTRUCTION CONSISTS OF A 12-BIT OPCODE (BITS 0-11) AND FOUR FLAG BITS (12-15). ^THE ^^MBD\\ INTERPRETER FETCHES INSTRUCTION OPCODES FROM ^^MBD\\ OR ^^PDP\\ MEMORY; THE FLAG BITS ARE LOADED INTO THE ^^CTR\\ (CONTROL REGISTER) WHERE THEY CAN BE TESTED BY THE ^C12, ^C13, ^C14, AND ^C15 CONDITIONS; THE 12-BIT OPCODE IS USED AS AN INDEX INTO AN INSTRUCTION DISPATCH TABLE WHICH CONTAINS THE ADDRESS OF THE .INDEX FUNCTION ROUTINES ^^MBD\\ FUNCTION ROUTINE WHICH IMPLEMENTS THAT INSTRUCTION. ^THIS ADDRESS IS LOADED INTO THE LOW ORDER 12 BITS OF THE ^^CTR\\ AND A ^^JVC\\ INSTRUCTION (JUMP VIA THE ^^CTR\\) IS EXECUTED TO DISPATCH TO THE FUNCTION ROUTINE. ^THIS ENTIRE PROCESS TAKES 14 ^^MBD\\ INSTRUCTIONS, OR 4.9 MICROSECONDS. ^IF THE OPCODE IS OUT OF RANGE, AN ERROR CONDITION IS FLAGGED: THE .INDEX COMPLETION CODE INVALID OPCODE IS USED AS THE ERROR INFORMATION WORD, AND A COMPLETION CODE OF ^^CE.INV\\ IS RETURNED ON CHANNEL EXIT. ^ACTUALLY, THERE ARE TWO INSTRUCTION DISPATCH TABLES, ONE FOR ^^PDP\\ CHANNEL PROGRAMS, AND ONE FOR ^^MBD\\ CHANNEL PROGRAMS. ^THIS IS NECESSARY BECAUSE ^^PDP\\-CALLABLE .INDEX ^^PDP\\ BUFFER FUNCTIONS MUST TAKE THEIR ARGUMENTS FROM THE ^^PDP\\ BUFFER, WHILE ^^MBD\\-CALLABLE FUNCTIONS USUALLY TAKE ARGUMENTS FROM THE ^^MBD\\ MEMORY, WHICH REQUIRES A DIFFERENT FUNCTION ROUTINE. ^BY THIS MEANS THE SAME CHANNEL PROGRAM (SAME OPCODES, AND ARGUMENTS FOLLOWING THE OPCODES) CAN BE EITHER EXECUTED FROM ^^PDP\\ MEMORY OR LOADED INTO THE ^^MBD\\ AND EXECUTED FROM THERE (WITH RESTRICTIONS IN SOME CASES). .PARAGRAPH .INDEX MACROS ^MACROS HAVE BEEN WRITTEN AND STORED IN THE MACRO LIBRARY ^^SY:[310,3]DCPMAC.MLB\\ WHICH FACILITATE WRITING CHANNEL PROGRAMS BY GENERATING THE APPROPRIATE OPCODES, FLAG BITS, AND ARGUMENTS FOR THE INSTRUCTIONS, AS APPROPRIATE. ^MOST OF THE ^^CAMAC\\ TRANSFER INSTRUCTIONS TAKE A VARIABLE LENGTH ARGUMENT LIST WHICH IS NOT GENERATED BY THE MACROS. .INDEX ^^FCNA\\ ^THIS ARGUMENT LIST CONSISTS OF ^^CAMAC\\ COMMANDS (FUNCTION, CRATE, STATION NUMBER, AND SUBADDRESS) AND MAY BE GENERATED BY THE ^^FCNA\\ MACRO, WHOSE SYNTAX IS: .SKIP .LEFT MARGIN 33 .INDENT -33 ########^^FCNA\\####^&FUNCTION\&,^&CRATE\&,^&STATION\&,^&SUBADRESS\& .SKIP .LEFT MARGIN 0 ^THE ^^FCNA\\ LIST IS TERMINATED BY A ZERO WORD, WHICH IS GENERATED BY AN ^^FEND\\ MACRO. ^AN EXAMPLE IS: .SKIP .LEFT MARGIN 33 .INDENT -33 ^^########C2P#####CMF.24 .INDENT -33 ########FCNA####0,1,2,0 .INDENT -33 ########FCNA####0,1,2,1 .INDENT -33 ########FEND\\ .SKIP .LEFT MARGIN 0 WHICH CAUSES CRATE 1, STATION 2, SUBADDRESSES 0 AND 1 TO BE READ (FUNCTION 0) INTO THE ^^PDP\\-11 BUFFER IN 24-BIT FORMAT, I.E., AS FOUR SUCCESSIVE 16 BIT WORDS. .PARAGRAPH ^THE MACRO ^^CHNPRG\\ SHOULD BE CALLED AT THE BEGINNING OF THE MODULE CONTAINING THE CHANNEL PROGRAM BY A STATEMENT SUCH AS: .SKIP .LEFT MARGIN 33 .INDENT -33 ^^########.MCALL##CHNPRG .INDENT -33 ########CHNPRG\\ .SKIP .LEFT MARGIN 0 ^IT CONTAINS .^^MCALL\\ DIRECTIVES FOR ALL THE OTHER CHANNEL INSTRUCTION MACROS, THUS CAUSING THEM TO BE DEFINED TO THE ASSEMBLER. ^IT ALSO WILL DEFINE (IF UNDEFINED) THE SYMBOL $ USED BY THE ^^FCNA\\ MACRO. .PARAGRAPH ^THE FOLLOWING DESCRIBES THE AVAILABLE CHANNEL INSTRUCTIONS AND THE .INDEX MACROS FORMAT OF THE MACRO CALLS WHICH GENERATE THEM. ^UNLESS OTHERWISE SPECIFIED, THE INSTRUCTIONS MAY BE USED IN EITHER ^^MBD\\-#OR ^^PDP\\-RESIDENT CHANNEL PROGRAMS. .LEFT MARGIN 4 .INDENT -4 .SKIP .INDEX CHANNEL STOP 1. ^^STOP\\ .BREAK ^THIS INSTRUCTION IS NORMALLY THE LAST EXECUTED BY A CHANNEL PROGRAM. .INDEX COMPLETION CODE .INDEX WORD COUNT .INDEX ERROR INFORMATION WORD ^IT CAUSES THE LAST STORED COMPLETION CODE AND WORD COUNT OR ERROR INFORMATION WORD TO BE WRITTEN INTO THE ^^PDP\\-11 BUFFER HEADER, .INDEX INTERRUPT THE COMPUTER TO BE INTERRUPTED, AND THE CHANNEL TO EXIT (VIA "^E^X4", WHICH CLEARS A BIT IN THE ^^PRL\\ ^&AND\& THE ^^CEL\\, EFFECTIVELY DISABLING .INDEX ^^MBD\\ HANDLER THE CHANNEL UNTIL RESTARTED BY THE ^^PDP\\-11). ^THE ^^MBD\\ HANDLER RETURNS THE .INDEX ^I/^O STATUS BLOCK RESULTS OF THE OPERATION TO THE ^I/^O STATUS BLOCK SPECIFIED BY THE INITIATING TASK. (^IF THE CHANNEL IS PROCESSING AN .INDEX ABORT REQUEST ABORT REQUEST, ^^STOP\\ MERELY EXECUTES "^E^X4" TO KILL THE CHANNEL). .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.STP##########;STOP CHANNEL\\ .SKIP .LEFT MARGIN 4 .INDENT -4 2. ^^CONT\\ .BREAK ^THIS INSTRUCTION HAS NO EFFECT. ^IT IS A CHANNEL PROGRAM NO-OP. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.NOP##########;CONTINUE (NO-OP)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 3. ^^EXECP\\ .BREAK ^THIS INSTRUCTION IN AN ^^MBD\\-RESIDENT CHANNEL PROGRAM CAUSES THE NEXT INSTRUCTION TO BE TAKEN FROM THE ^^PDP\\ BUFFER AT THE CURRENT BUFFER POINTER POSITION. ^SUCCESSIVE INSTRUCTIONS ARE EXECUTED FROM THE BUFFER UNTIL AN ^^EXECM\\ INSTRUCTION IS ENCOUNTERED OR THE CHANNEL STOPS. ^IT IS A NO-OP IF ENCOUNTERED IN A ^^PDP\\ CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.EXP##########;EXECUTE PDP CHANNEL PROGRAM\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 4. ^^EXECM\\ .BREAK ^THIS INSTRUCTION IN A ^^PDP\\-RESIDENT CHANNEL PROGRAM CAUSES THE NEXT INSTRUCTIONS TO BE TAKEN FROM THE ^^MBD\\ LOCATIONS FOLLOWING THE ^^EXECP\\ INSTRUCTION WHICH INITIATED THE ^^PDP\\ PROGRAM. ^THE ^^PDP\\ BUFFER POINTER IS LEFT POSITIONED AFTER THE ^^EXECM\\ INSTRUCTION. ^IT IS A NO-OP IF ENCOUNTERED IN AN ^^MBD\\ CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.EXM##########;EXECUTE MBD CHANNEL PROGRAM\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 5. ^^MRK\\ .BREAK ^THIS INSTRUCTION ACTS LIKE ^^STOP\\ EXCEPT THAT BEFORE EXITING, .INDEX NORMAL ENTRY THE NORMAL ENTRY POINT OF THE CHANNEL IS CHANGED TO POINT TO THE ^^MBD\\ LOCATION FOLLOWING THE ^^MRK\\ INSTRUCTION. ^WHEN THE CHANNEL IS LATER EXECUTED AGAIN BY THE ^^PDP\\-11 VIA ANOTHER .INDEX ^^QIO\\ ^^QIO\\, EXECUTION WILL BEGIN WITH THE FOLLOWING INSTRUCTION. ^IF THIS INSTRUCTION IS USED IN A ^^PDP\\-RESIDENT CHANNEL PROGRAM, THE NORMAL ENTRY (WHICH ALWAYS POINTS TO AN ^^MBD\\ ADDRESS) IS SET TO POINT TO THE ^^EXECP\\ INSTRUCTION THAT INITIATED THE ^^PDP\\ PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.MRK##########;SET RE-ENTRY ADDRESS (MARK)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 6. ^^EXIT\\ .BREAK .INDEX COMPLETION CODE .INDEX WORD COUNT ^THIS INSTRUCTION IS LIKE ^^STOP\\, EXCEPT THE COMPLETION CODE AND WORD COUNT ARE NOT RECORDED IN THE BUFFER HEADER. ^HENCE THE VALUES LEFT BY THE ^^RSX\\ HANDLER (COMPLETION CODE = ^^IE.ONP\\, WORD COUNT = TOTAL BUFFER .INDEX ^I/^O STATUS BLOCK LENGTH) WILL BE RETURNED TO THE CALLER'S ^I/^O STATUS BLOCK. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.EXI##########;CHANNEL EXIT\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 7. ^^INTR\\ .BREAK .INDEX INTERRUPT ^THIS INSTRUCTION CAUSES THE CHANNEL TO INTERRUPT THE ^^PDP\\-11. .INDEX ^^MBD\\ HANDLER ^THIS CAUSES THE ^^MBD\\ ^I/^O HANDLER TO RETURN THE DEFAULT COMPLETION CODE (^^IE.ONP\\) AND WORD COUNT (TOTAL BUFFER LENGTH) TO THE ^I/^O STATUS BLOCK AND SIGNAL ^I/^O COMPLETION TO THE CALLING TASK. ^THE ^^MBD\\ CHANNEL PROGRAM, HOWEVER, CONTINUES TO RUN UNTIL A ^^STOP\\ INSTRUCTION IS LATER EXECUTED. ^WHATEVER THE CHANNEL DOES AFTER THE ^^INTR\\ AND BEFORE THE ^^STOP\\, .INDEX ^^PDP\\ BUFFER IT MAY NOT EXECUTE ANY INSTRUCTIONS THAT REFERENCE THE ^^PDP\\ BUFFER. ^^INTR\\ CAUSES THE BUFFER PARAMETERS TO BE SET TO POINT TO A ZERO-LENGTH BUFFER, AS FOR A CHANNEL ABORT (^^IO.KIL\\) OPERATION, SO THAT ANY ATTEMPTS TO READ OR WRITE ^^PDP\\ MEMORY WILL CAUSE AN ERROR EXIT TO BE TAKEN. ^WHEN A ^^STOP\\ INSTRUCTION IS FINALLY EXECUTED, THE CHANNEL MERELY EXITS VIA "^E^X4" WITHOUT WRITING OUT A COMPLETION CODE OR INTERRUPTING THE ^^PDP\\-11. ^THIS INSTRUCTION IS INVALID IN A ^^PDP\\ RESIDENT CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.INT##########;INTERRUPT PDP-11\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 8. ^^WDCNT\\ .BREAK .INDEX WORD COUNT ^THIS INSTRUCTION CAUSES THE CURRENT VALUE OF THE WORD COUNT REGISTER (RELATIVE POSITION IN ^^PDP\\-11 BUFFER) TO BE WRITTEN OUT INTO THE FIRST WORD OF THE BUFFER. ^NOTE THAT A WORD (NOT BYTE) QUANTITY IS WRITTEN. ^THIS INSTRUCTION MAY BE USED TO OBTAIN A PARTIAL DATA TRANSFER COUNT IN THE MIDDLE OF AN OPERATION; IF DATA IS BEING TRANSFERED INTO THE BUFFER FROM THE ^^MBD\\ AND IT IS DESIRED TO AVOID OVERWRITING THE FIRST WORD TRANSFERED BY THE WORD COUNT, AN "^^INCR\\" INSTRUCTION MAY BE USED AT THE START OF THE CHANNEL PROGRAM TO SKIP THE FIRST WORD. (^IF THE CHANNEL IS PROCESSING AN ABORT REQUEST, THIS INSTRUCTION IS IGNORED). .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.WCT##########;SEND WORD COUNT TO BUFFER\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 9. ^^ERR\\#####^&CODE\&,^&INFO\& .BREAK ^THIS INSTRUCTION CAUSES A USER-DEFINED ERROR TO BE SIGNALLED. ^THE VALUE OF ^&CODE\&, WHICH IS REQUIRED, IS .INDEX COMPLETION CODE WRITTEN INTO THE COMPLETION CODE REGISTER (POSITIVE FOR A NON-FATAL ERROR, NEGATIVE FOR A FATAL ERROR). ^THE VALUE OF .INDEX ERROR INFORMATION WORD ^&INFO\&, WHICH IS OPTIONAL, IS WRITTEN INTO THE ERROR INFORMATION WORD .INDEX ERROR EXIT (OR ZERO IF OMITTED). ^THEN AN ERROR EXIT IS TAKEN, IF ONE EXISTS, OR A ^^STOP\\ IS EXECUTED IF NOT. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.ERR##########;SIGNAL ERROR .INDENT -33 ########.WORD###^&\\INFO^^\&############;ERROR INFORMATION .INDENT -33 ########.WORD###^&\\CODE^^\&############;COMPLETION CODE\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 10.#^^PERR\\ .BREAK ^THIS INSTRUCTION, FOR ^^MBD\\ CHANNEL PROGRAMS, IS LIKE ^^ERR\\ EXCEPT THAT THE INFORMATION AND CODE WORDS ARE READ FROM THE NEXT TWO WORDS OF THE ^^PDP\\ BUFFER (INFORMATION FOLLOWED BY CODE). ^FOR ^^PDP\\ CHANNEL PROGRAMS, IT IS IDENTICAL TO ^^ERR\\, EXCEPT THAT THE MACRO CALL DOES NOT GENERATE THE INFORMATION AND CODE WORDS, SO THEY MUST BE ASSEMBLED INTO THE TWO WORDS FOLLOWING THE INSTRUCTION BY THE USER. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PER##########;SIGNAL ERROR FROM PDP BUFFER\\ .LEFT MARGIN 4 .INDENT -4 .SKIP .INDEX ^^LAM\\ 11.#^^LAM\\ .BREAK ^THIS INSTRUCTION CAUSES THE CHANNEL PROGRAM TO BE SUSPENDED UNTIL A ^^LAM\\ IS GENERATED ON THE ^^CAMAC\\ BRANCH. ^ONE OR MORE ^^LAM\\ SOURCES MAY BE ASSOCIATED WITH EACH OF THE 8 CHANNELS, IN THE ORDER: ^G^L17 -> CHANNEL 0, ..., ^G^L24 -> CHANNEL 7. ^THE ACTUAL ASSIGNMENT OF .INDEX CRATE .INDEX BRANCH HIGHWAY ^^LAM\\-GENERATING MODULES IN EACH CRATE TO GRADED ^^LAM\\ (^G^L) LINES ON THE BRANCH HIGHWAY IS DETERMINED BY THE ^^LAM\\ GRADER IN THE CRATE. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.LAM##########;WAIT FOR LAM\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 12.#^^DCBR\\####^&ADDR\& .BREAK ^THIS INSTRUCTION IS USED PRIMARILY FOR LOOPING IN CHANNEL PROGRAMS. .INDEX LOOP COUNT ^EACH CHANNEL HAS ASSOCIATED WITH IT A SINGLE LOOP COUNT REGISTER WHICH CAN BE LOADED BY ^^LCNT\\ OR ^^PLCNT\\ INSTRUCTIONS. ^THE ^^DCBR\\ INSTRUCTION CAUSES THE LOOP COUNT TO BE DECREMENTED AND IF NON-ZERO, THE CHANNEL PROGRAM BRANCHES TO LOCATION ^&ADDR\&. ^IF ZERO, HOWEVER, EXECUTION CONTINUES WITH THE NEXT INSTRUCTION. ^NOTE THAT NESTING OF LOOPS IS NOT POSSIBLE. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.DCB##########;DECREMENT COUNT AND BRANCH IF NON-ZERO .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;BRANCH OFFSET\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 13.#^^JUMP\\####^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES AN UNCONDITIONAL BRANCH TO LOCATION ^&ADDR\& IN THE CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.JMP##########;JUMP TO ANOTHER LOCATION .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;BRANCH OFFSET\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 14.#^^SKIP\\ .BREAK ^THIS INSTRUCTION CAUSES THE NEXT INSTRUCTION IN THE CHANNEL PROGRAM TO BE SKIPPED. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.SKP##########;SKIP NEXT LOCATION\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 15.#^^MOVE\\####^&AMNT\& .BREAK ^THIS INSTRUCTION, FOR ^^MBD\\-RESIDENT CHANNEL PROGRAMS, CAUSES THE QUANTITY ^&AMNT\& (WORDS) TO BE ADDED TO THE CURRENT ^^PDP\\ BUFFER POINTER. ^&^AMNT\& MAY BE POSITIVE OR NEGATIVE, BUT THE FINAL BUFFER POINTER VALUE MUST BE WITHIN THE RANGE OF THE BUFFER. ^FOR ^^PDP\\-RESIDENT PROGRAMS, IT ACTS LIKE ^^JUMP\\, SINCE THE BUFFER POINTER IS THE ^^PDP\\ PROGRAM'S "PROGRAM COUNTER" (BUT THE MACRO ARGUMENT ^&AMNT\& IS THE OFFSET TO THE JUMP DESTINATION, NOT THE DESTINATION ADDRESS ITSELF AS FOR ^^JUMP\\). .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.MOV##########;MOVE PDP BUFFER POINTER FWD OR BKWD .INDENT -33 ########.WORD###^&\\AMNT^^\&############;AMOUNT (+ OR -) TO ADD TO POINTER\\ .LEFT MARGIN 4 .SKIP .INDENT -4 16.#^^INCR\\ .BREAK ^THIS INSTRUCTION CAUSES THE ^^PDP\\ BUFFER POINTER TO BE MOVED ONE WORD AHEAD, SKIPPING THE NEXT WORD OF THE BUFFER. ^FOR ^^PDP\\-RESIDENT PROGRAMS, IT IS IDENTICAL TO ^^SKIP\\. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.INC##########;MOVE PDP BUFFER POINTER 1 WORD AHEAD\\ .SKIP .LEFT MARGIN 4 .INDENT -4 17.#^^BRC\\#####^&FLGS\&,^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION PERFORMS A ^^CAMAC\\ CONTROL COMMAND AND BRANCHES IF THE ^X OR ^Q RESPONSES RETURNED FROM THE MODULE (BRANCH LINES ^B^X, ^B^Q) ARE AS SPECIFIED BY ^&FLGS\&. ^THE ^^CAMAC\\ CONTROL ^^FCNA\\ IS SPECIFIED BY ^&CF\&, ^&CC\&, ^&CN\&, AND ^&CA\& (TYPICAL ^&CF\& VALUES ARE 8, TEST ^^LAM\\; AND 27, TEST STATUS). ^THE BRANCH DESTINATION IS ^&ADDR\&. ^&^FLGS\& MAY OPTIONALLY SPECIFY THAT AN ERROR EXIT IS TO BE TAKEN IF NO ^X OR NO ^Q RESPONSE IS RETURNED FROM THE MODULE. ^&^FLGS\& CONSISTS OF 0 TO 4 FLAG BITS COMBINED TOGETHER BY THE "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING SET: .LEFT MARGIN 16 .INDENT -9 .SKIP ^^CMF.IX\\#-#IF NOT SPECIFIED, NO ^X RESPONSE IS A FATAL ERROR. ^IF SPECIFIED, NO ^X RESPONSE IS NOT AN ERROR. .SKIP .INDENT -9 ^^CMF.IQ\\#-#IF NOT SPECIFIED, NO ^Q RESPONSE IS A FATAL ERROR. ^IF SPECIFIED, NO ^Q RESPONSE IS NOT AN ERROR. .SKIP .INDENT -9 ^^CMF.TX\\#-#IF NOT SPECIFIED, THE ^Q BIT IS TESTED TO DETERMINE WHETHER OR NOT TO BRANCH. ^IF SPECIFIED, THE ^X BIT IS TESTED. .SKIP .INDENT -9 ^^CMF.ON\\#-#IF NOT SPECIFIED, THE BRANCH IS MADE IF THE TESTED BIT (^Q OR ^X) IS FALSE (OFF). ^IF SPECIFIED, THE BRANCH IS MADE IF IT IS TRUE (ON). .LEFT MARGIN 4 .SKIP ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.BRC!<^&\\FLGS^^\&+0>#;BRANCH ON CONDITION (Q OR X) .INDENT -33 ########FCNA####^&\\CF\&,^&CC\&,^&CN\&,^&CA^^\&#####;CONTROL COMMAND .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;BRANCH OFFSET\\ .SKIP .LEFT MARGIN 4 .INDENT -4 18.#^^BXT\\#####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH ON ^X TRUE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IX!CMF.IQ!CMF.TX!CMF.ON,\\&C&F,&C&C,&C&N,&C&A, ^&ADDR\& .LEFT MARGIN 4 .INDENT -4 .SKIP 19.#^^BXTQ\\####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH ON ^X TRUE, BUT A FATAL ERROR IF ^Q IS FALSE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IX!CMF.TX!CMF.ON,\\&C&F,^&CC\&,^&CN\&,^&CA\&, ^&ADDR\& .SKIP .LEFT MARGIN 4 .INDENT -4 20.#^^BQT\\#####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH ON ^Q TRUE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IX!CMF.IQ!CMF.ON,\\&C&F,^&CC\&,^&CN\&,^&CA\&, ^&ADDR\& .SKIP .LEFT MARGIN 4 .INDENT -4 21.#^^BQTX\\####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH IF ^Q TRUE, BUT A FATAL ERROR IF ^X IS FALSE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IQ!CMF.ON,\\^&CF\&,^&CC\&,^&CN\&,^&CA\&, ^&ADDR\& .SKIP .LEFT MARGIN 4 .INDENT -4 22.#^^BXF\\#####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH ON ^X FALSE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IX!CMF.IQ!CMF.TX,\\&C&F,^&CC\&,^&CN\&,^&CA\&, ^&ADDR\& .SKIP .LEFT MARGIN 4 .INDENT -4 23.#^^BXFQ\\####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH ON ^X FALSE, BUT A FATAL ERROR IF ^Q IS FALSE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IX!CMF.TX,\\^&CF\&,^&CC\&,^&CN\&,^&CA\&, ^&ADDR\& .SKIP .LEFT MARGIN 4 .INDENT -4 24.#^^BQF\\#####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH ON ^Q FALSE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IX!CMF.IQ,\\^&CF\&,^&CC\&,^&CN\&,^&CA\&, ^&ADDR\& .LEFT MARGIN 4 .INDENT -4 .SKIP 25.#^^BQFX\\####^&CF\&,^&CC\&,^&CN\&,^&CA\&,^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES A BRANCH ON ^Q FALSE, BUT A FATAL ERROR IF ^X FALSE. ^IT IS EQUIVALENT TO: .LEFT MARGIN 33 .INDENT -33 ^^########BRC#####CMF.IQ,\\^&CF\&,^&CC\&,^&CN\&,^&CA\&, ^&ADDR\& .SKIP .LEFT MARGIN 4 .INDENT -4 26.#^^JMPZ\\####^&MASK\&,^&ADDR\& .BREAK .INDEX LOOP COUNT ^THIS INSTRUCTION PERFORMS A LOGICAL "^^AND\\" BETWEEN THE CHANNEL'S LOOP COUNT AND THE NUMERIC VALUE ^&MASK\&, AND BRANCHES IF THE RESULT OF THE "^^AND\\" IS ZERO TO ADDRESS ^&ADDR\&. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.JPC##########;JUMP ON CONDITION (ZERO) .INDENT -33 ########.WORD###^&\\MASK^^\&############;BIT-MASK FOR LOOP COUNT TEST .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;BRANCH OFFSET\\ .SKIP .LEFT MARGIN 4 .INDENT -4 27.#^^JMPN\\####^&MASK\&,^&ADDR\& .BREAK .INDEX LOOP COUNT ^THIS INSTRUCTION PERFORMS A LOGICAL "^^AND\\" BETWEEN THE CHANNEL'S LOOP COUNT AND THE NUMERIC VALUE ^&MASK\&, AND BRANCHES IF THE RESULT OF THE "^^AND\\" IS NON-ZERO TO ADDRESS ^&ADDR\&. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.JPC!CMF.ON###;JUMP ON CONDITION (NON-ZERO) .INDENT -33 ########.WORD###^&\\MASK^^\&############;BIT-MASK FOR LOOP COUNT TEST .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;BRANCH OFFSET\\ .SKIP .LEFT MARGIN 4 .INDENT -4 28.#^^LCNT\\####^&COUNT\& .BREAK .INDEX LOOP COUNT ^THIS INSTRUCTION CAUSES THE CHANNEL'S LOOP COUNT TO BE LOADED WITH THE VALUE ^&COUNT\&. ^A TYPICAL CHANNEL PROGRAM LOOP IS: .LEFT MARGIN 33 .INDENT -33 ^^########LCNT####25.#############;REPEAT 25 TIMES .INDENT -33 1$:#####SEND####0###############;ZERO THE NEXT WORD OF THE BUFFER .INDENT -33 ########DCBR####1$##############;LOOP BACK\\ .SKIP .LEFT MARGIN 4 ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.LCO##########;LOAD LOOP COUNT .INDENT -33 ########.WORD###^&\\COUNT^^\&###########;COUNT VALUE\\ .SKIP .LEFT MARGIN 4 .INDENT -4 29.#^^PLCNT\\ .BREAK .INDEX LOOP COUNT ^THIS INSTRUCTION CAUSES THE CHANNEL'S LOOP COUNT TO BE LOADED FROM THE NEXT WORD OF THE ^^PDP\\ BUFFER. ^FOR ^^PDP\\-RESIDENT CHANNEL PROGRAMS, IT IS EQUIVALENT TO ^^LCNT\\ EXCEPT THAT THE MACRO DOES NOT GENERATE THE COUNT VALUE, SO IT MUST BE ASSEMBLED IN FOLLOWING THE ^^PLCNT\\ INSTRUCTION BY THE USER. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PLC##########;LOAD LOOP COUNT FROM PDP BUFFER\\ .SKIP .LEFT MARGIN 4 .INDENT -4 30.#^^JMPE\\####^&ADDR\& .BREAK .INDEX ERROR EXIT ^THIS INSTRUCTION CAUSES THE ERROR EXIT ADDRESS TO BE SET TO ^&ADDR\&. ^ERRORS OCCURING LATER IN THE CHANNEL PROGRAM WILL CAUSE CONTROL TO BE TRANSFERRED TO ^&ADDR\&. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.JPE##########;SET ERROR EXIT ADDRESS .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;ADDRESS OFFSET\\ .SKIP .LEFT MARGIN 4 .INDENT -4 31.#^^CLEAR\\ .BREAK .INDEX CONTROL CHANNEL ^THIS INSTRUCTION, WHICH IS NORMALLY EXECUTED BY THE CONTROL CHANNEL .INDEX CHANNEL PROGRAM (7), CAUSES ALL ^^MBD\\-RESIDENT CHANNEL PROGRAMS EXCEPT 7 TO BE REMOVED. ^THEIR NORMAL AND ABORT ENTRY POINTS ARE SET TO POINT TO AN INVALID INSTRUCTION TRAP SO THAT ANY ATTEMPT TO EXECUTE THEM WILL FAIL. ^THE ENTIRE AREA ABOVE THE ^^MBD\\ EXECUTIVE BECOMES AVAILABLE FOR LOADING OF ^^MBD\\ CHANNEL PROGRAMS BY THE ^^LOAD\\ INSTRUCTION. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.CLR##########;CLEAR OUT (FLUSH) ALL MBD CHANNEL PGMS (EXCEPT 7)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 32.#^^LOAD\\####^&CHAN\&,^&ABRT\&,^&PRGEND\& .BREAK ^THIS INSTRUCTION, WHICH IS NORMALLY EXECUTED BY THE CONTROL CHANNEL (7), LOADS A CHANNEL PROGRAM INTO THE NEXT AVAILABLE AREA IN ^^MBD\\ MEMORY (ABOVE THE LAST LOADED CHANNEL PROGRAM, OR ABOVE THE EXECUTIVE IF NO CHANNEL PROGRAM WAS PREVIOUSLY LOADED). ^THE ^^LOAD\\ INSTRUCTION MUST BE FOLLOWED BY THE CHANNEL PROGRAM TO BE LOADED. ^&^CHAN\& SPECIFIES THE ^^MBD\\ CHANNEL NUMBER WHICH IS TO EXECUTE THE CHANNEL PROGRAM (0 TO 7, BUT 7 SHOULD BE AVOIDED AS IT IS NORMALLY USED FOR THE CONTROL .INDEX ABORT ENTRY CHANNEL). ^&^ABRT\& SPECIFIES THE ABORT ENTRY ADDRESS OF THE CHANNEL .INDEX NORMAL ENTRY PROGRAM (THE NORMAL ENTRY IS ALWAYS THE FIRST WORD OF THE PROGRAM). ^&^PRGEND\& SPECIFIES THE ADDRESS FOLLOWING THE LAST WORD OF THE CHANNEL PROGRAM. ^IF A ^^LOAD\\ INSTRUCTION IS TO BE EXECUTED FROM AN ^^MBD\\-RESIDENT CHANNEL PROGRAM (A NON-STANDARD USAGE), THE ARGUMENTS ^&CHAN\&, ^&ABRT\&, AND ^&PRGEND\& SHOULD BE OMITTED SINCE THEY (AND THE CHANNEL PROGRAM ITSELF) ARE ALWAYS READ FROM THE ^^PDP\\ BUFFER (AS OFFSETS, HOWEVER --#SEE MACRO EXPANSION). ^AN EXAMPLE IS: .SKIP .LEFT MARGIN 33 .INDENT -33 ^^########LOAD####3,LAMOFF,PGEND##;LOAD CHANNEL 3 PROGRAM .INDENT -33 ########JMPE####LAMOFF##########;JUMP ON ERROR TO "LAMOFF" .INDENT -33 ########CTLX####################;EXECUTE CAMAC CONTROL .INDENT -33 ########FCNA####26.,1,1,0#######;ENABLE LAMS F(26) C(1) N(1) A(0) .INDENT -33 ########FEND .INDENT -33 ########LAM#####################;WAIT FOR LAM .INDENT -33 ########C2P#####################;READ CAMAC TO PDP .INDENT -33 ########FCNA####2,1,1,0#########;READ AND CLEAR F(2) C(1) N(1) A(0) .INDENT -33 ########FEND .INDENT -33 LAMOFF:#CTLX####################;EXECUTE CAMAC CONTROL .INDENT -33 ########FCNA####24.,1,1,0#######;DISABLE LAMS F(24) C(1) N(1) A(0) .INDENT -33 ########FEND .INDENT -33 ########STOP####################;STOP CHANNEL .INDENT -33 PGEND:##########################;END OF CHANNEL 3 PROGRAM\\ .SKIP .LEFT MARGIN 4 ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.LOD##########;LOAD MBD CHANNEL PGM FROM PDP BUFFER .INDENT -33 ########.WORD###^&\\CHAN^^\&############;CHANNEL NUMBER .INDENT -33 ########.WORD###<^&\\ABRT^^\&-.-4>/2####;OFFSET TO ABORT ENTRY "ABRT" .INDENT -33 ########.WORD###<^&\\PRGEND^^\&-.-2>/2##;NO. OF WORDS = OFFSET TO LAST WD.+1 "PRGEND"\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 33.#^^DEPOS\\####^&ADDR\&,^&DATA\& .BREAK ^THIS INSTRUCTION, WHICH IS NORMALLY EXECUTED BY A ^^PDP\\-RESIDENT CHANNEL PROGRAM, CAUSES THE WORD ^&DATA\& TO BE DEPOSITED INTO THE ^^MBD\\ MEMORY LOCATION ^&ADDR\&. ^IF EXECUTED FROM AN ^^MBD\\-RESIDENT PROGRAM, THE ARGUMENTS ^&ADDR\& AND ^&DATA\& SHOULD BE OMITTED SINCE THEY ARE READ FROM THE ^^PDP\\ BUFFER. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.DEP##########;DEPOSIT NO. FROM PDP BUFFER INTO MBD .INDENT -33 ########.WORD###^&\\ADDR^^\&############;ADDRESS TO DEPOSIT INTO .INDENT -33 ########.WORD###^&\\DATA^^\&############;DATA TO DEPOSIT\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 34.#^^EXAM\\####^&ADDR\&,^&DATA\& .BREAK ^THIS INSTRUCTION, WHICH IS NORMALLY EXECUTED BY A ^^PDP\\-RESIDENT CHANNEL PROGRAM, CAUSES THE CONTENTS OF ^^MBD\\ MEMORY LOCATION ^&ADDR\& TO BE WRITTEN TO THE ^^PDP\\ BUFFER FOR EXAMINATION. ^&^DATA\& IS AN OPTIONAL SYMBOL TO BE EQUATED TO THE ADDRESS OF THE WORD INTO WHICH THE CONTENTS WILL BE WRITTEN. ^IF EXECUTED FROM AN ^^MBD\\-RESIDENT PROGRAM, THE ARGUMENTS ^&ADDR\& AND ^&DATA\& SHOULD BE OMITTED; ^&ADDR\& WILL BE READ FROM THE ^^PDP\\ BUFFER, AND THE CONTENTS OF THE WORD WHOSE ADDRESS IS ^&ADDR\& WILL BE WRITTEN INTO THE BUFFER WORD FOLLOWING THAT WHICH CONTAINED ^&ADDR\&. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.EXA##########;EXAMINE MBD MEMORY (SEND TO PDP BUFFER) .INDENT -33 ########.WORD###^&\\ADDR^^\&############;ADDRESS TO EXAMINE .INDENT -33 ^&\\DATA^^\&####=#######.###############;OPTIONAL LABEL OF RETURNED DATA .INDENT -33 ########.WORD###0###############;DATA IS RETURNED HERE\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 35.#^^SEND\\####^&DATA\& .BREAK ^THIS INSTRUCTION CAUSES THE WORD ^&DATA\& TO BE SENT TO THE ^^PDP\\ BUFFER. ^IT IS INVALID IN A ^^PDP\\-RESIDENT CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 34 .INDENT -33 ^^########.WORD###CM.SND##########;SEND A WORD TO PDP BUFFER .INDENT -33 ########.WORD###^&\\DATA^^\&############;WORD TO SEND\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 36.#^^BRZ\\ .BREAK .INDEX BRANCH INITIALIZE ^THIS INSTRUCTION CAUSES A ^B^Z (BRANCH INITIALIZE) COMMAND TO BE SENT .INDEX BRANCH HIGHWAY OUT ON THE ^^CAMAC\\ BRANCH HIGHWAY. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.BRZ##########;CAMAC BZ (BRANCH INITIALIZE)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 37.#^^CTLXQ\\ .BREAK ^THIS INSTRUCTION CAUSES A LIST OF ^^CAMAC\\ CONTROL COMMANDS TO BE EXECUTED. .INDEX ^^FCNA\\ ^IT SHOULD BE FOLLOWED BY THE ^^FCNA\\ LIST TERMINATED BY AN ^^FEND\\. ^A FATAL ERROR WILL OCCUR IF NO ^Q OR NO ^X RESPONSE IS GIVEN AFTER EACH COMMAND. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.CTL##########;EXECUTE CONTROL FCNA'S (ERROR IF X OR Q FALSE)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 38.#^^CTLQ\\ .BREAK ^SAME AS ^^CTLXQ\\ EXCEPT THAT NO ^X RESPONSE WILL NOT CAUSE A FATAL ERROR. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.CTL!CMF.IX###;EXECUTE CONTROL FCNA'S (ERROR IF Q FALSE, IGNORE X)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 39.#^^CTLX\\ .BREAK ^SAME AS ^^CTLXQ\\ EXCEPT THAT NO ^Q RESPONSE WILL NOT CAUSE A FATAL ERROR. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.CTL!CMF.IQ###;EXECUTE CONTROL FCNA'S (ERROR IF X FALSE, IGNORE Q)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 40.#^^CTL\\ .BREAK ^SAME AS ^^CTLXQ\\ EXCEPT THAT NO ^X OR NO ^Q RESPONSE WILL NOT CAUSE A FATAL ERROR. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 .BREAK ^^########.WORD###CM.CTL!CMF.IX!CMF.IQ;EXECUTE CONTROL FCNA'S (IGNORE X AND Q)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 41.#^^PCTLXQ\\ .BREAK ^THIS INSTRUCTION CAUSES A LIST OF ^^CAMAC\\ CONTROL COMMANDS (^^FCNA\\'S) TO BE READ FROM THE ^^PDP\\ BUFFER AND EXECUTED. ^THE LIST IS TERMINATED BY A ZERO WORD. ^A FATAL ERROR WILL OCCUR IF NO ^Q OR NO ^X RESPONSE IS GIVEN AFTER EACH COMMAND. (^SAME AS ^^CTLXQ\\ FOR ^^PDP\\-RESIDENT CHANNEL PROGRAMS). .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PCT##########;EXECUTE CONTROL FCNA'S (ERROR IF X OR Q FALSE)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 42.#^^PCTLQ\\ .BREAK ^SAME AS ^^PCTLXQ\\ EXCEPT THAT NO ^X RESPONSE WILL NOT CAUSE A FATAL ERROR. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PCT!CMF.IX###;EXECUTE CONTROL FCNA'S (ERROR IF Q FALSE, IGNORE X)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 43.#^^PCTLX\\ .BREAK ^SAME AS ^^PCTLXQ\\ EXCEPT THAT NO ^Q RESPONSE WILL NOT CAUSE A FATAL ERROR. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PCT!CMF.IQ###;EXECUTE CONTROL FCNA'S (ERROR IF X FALSE, IGNORE Q)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 44.#^^PCTL\\ .BREAK ^SAME AS ^^PCTLXQ\\ EXCEPT THAT NO ^X OR NO ^Q RESPONSE WILL NOT CAUSE A FATAL ERROR. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PCT!CMF.IX!CMF.IQ;EXECUTE CONTROL FCNA'S (IGNORE X AND Q)\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 45.#^^M2C\\####^&FLGS\& .BREAK .INDEX ^^CAMAC\\ WRITE ^THIS INSTRUCTION CAUSES A LIST OF ^^CAMAC\\ WRITE COMMANDS TO BE EXECUTED. ^IT SHOULD BE FOLLOWED BY THE LIST OF ^^FCNA\\'S WITH INTERSPERSED DATA WORDS (ONE OR TWO PER ^^FCNA\\, DEPENDING ON 16 OR 24 BIT MODE). ^THE LIST IS TERMINATED BY AN ^^FEND\\. ^THIS INSTRUCTION IS INVALID FROM A ^^PDP\\-RESIDENT CHANNEL PROGRAM. ^THE ARGUMENT ^&FLGS\& IS A LIST OF 0 TO 4 OPTION BITS SEPARATED FROM EACH OTHER BY A "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING SET: .SKIP .LEFT MARGIN 16 .INDENT -9 ^^CMF.IX\\#-#IF NOT SPECIFIED, NO ^X RESPONSE FROM A MODULE WILL CAUSE A FATAL ERROR. ^IF SPECIFIED, ^X WILL BE IGNORED. .SKIP .INDENT -9 ^^CMF.IQ\\#-#IF NOT SPECIFIED, NO ^Q RESPONSE FROM A MODULE WILL EITHER CAUSE A FATAL ERROR, OR CAUSE THE WRITE TO BE RETRIED. ^IF SPECIFIED, NO ^Q WILL BE IGNORED. .SKIP .INDENT -9 .INDEX ^Q-REPEAT MODE ^^CMF.QR\\#-#IF SPECIFIED (AND ^^CMF.IQ\\ IS ^&NOT\& SPECIFIED), ^Q-REPEAT BLOCK TRANSFER MODE WILL BE USED, I.E., EACH WRITE WILL BE RETRIED IF ^Q=0 UNTIL A ^Q=1 RESPONSE IS OBTAINED (THIS WILL OCCUR UP TO 65,536 TIMES, AFTER WHICH THE MODULE IS CONSIDERED DEFECTIVE AND A "NO ^Q" FATAL ERROR OCCURS). ^IF NOT SPECIFIED (AND ^^CMF.IQ\\ IS ^&NOT\& SPECIFIED), NO ^Q RESPONSE WILL CAUSE A FATAL ERROR. .INDENT -9 .SKIP ^^CMF.24\\#-#IF SPECIFIED, TWO 16-BIT ^^MBD\\ WORDS FOLLOWING EACH ^^FCNA\\ ARE ASSEMBLED INTO ONE 24-BIT ^^CAMAC\\ WORD (FIRST WORD = HIGH ORDER 8 BITS, SECOND WORD = LOW ORDER 16 BITS). ^IF NOT SPECIFIED, ONE 16-BIT ^^MBD\\ WORD FOLLOWING EACH ^^FCNA\\ IS USED AND THE HIGH ORDER 8 BRANCH DATA BITS ARE SET TO ZERO. .LEFT MARGIN 4 .SKIP ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.M2C!<^&\\FLGS^^\&+0>#;DO MBD TO CAMAC WRITE\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 46.#^^PM2C\\####^&FLGS\&,^&DATALO\&,^&DATAHI\& .BREAK .INDEX ^^CAMAC\\ WRITE ^THIS INSTRUCTION CAUSES A SINGLE DATA WORD TO BE WRITTEN INTO ONE OR MORE ^^CAMAC\\ MODULES. ^THE ARGUMENTS ^&DATALO\& AND ^&DATAHI\& SPECIFY THE LOW 16 AND HIGH 8 BITS OF THE DATA TO BE WRITTEN. ^THE LIST OF ^^CAMAC\\ WRITE ^^FCNA\\'S IS READ FROM THE ^^PDP\\ BUFFER AND IS TERMINATED BY A ZERO WORD. ^THIS INSTRUCTION IS INVALID FROM A ^^PDP\\-RESIDENT CHANNEL PROGRAM. ^THE ARGUMENT ^&FLGS\& IS A LIST OF 0 TO 4 OPTION BITS SEPARATED FROM EACH OTHER BY A "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING SET: .LEFT MARGIN 16 .INDENT -9 .SKIP ^^CMF.IX\\#-#MEANING AS FOR ^M2^C .SKIP .LEFT MARGIN 16 .INDENT -9 .INDEX ^Q-STOP MODE ^^CMF.QS\\#-#IF SPECIFIED, ^Q-STOP BLOCK TRANSFER MODE WILL BE USED, I.E., EACH WRITE WILL BE REPEATED IF ^Q=1 UNTIL A ^Q=0 RESPONSE IS OBTAINED (NO LIMIT ON HOW MANY TIMES THIS WILL OCCUR). ^IF NOT SPECIFIED, NO ^Q RESPONSE FROM A MODULE WILL EITHER CAUSE A FATAL ERROR, OR CAUSE THE WRITE TO BE RETRIED. .SKIP .INDENT -9 ^^CMF.QR\\#-#MEANING AS FOR ^M2^C .SKIP .INDENT -9 ^^CMF.24\\#-#IF SPECIFIED, ^&DATALO\& AND ^&DATAHI\& ARE BOTH REQUIRED. ^IF NOT SPECIFIED, ^&DATAHI\& IS OPTIONAL (AND IGNORED) AND THE HIGH ORDER 8 BITS OF THE DATA WRITTEN WILL BE ZERO. .LEFT MARGIN 4 .SKIP ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PMC!<^&\\FLGS^^\&+0>#;DO MBD TO CAMAC WRITE, FCNA'S IN PDP BUFFER .INDENT -33 ########.WORD###^&\\DATAHI^^\&##########;HIGH ORDER DATA (ONLY IF 24-BIT) .INDENT -33 ########.WORD###^&\\DATALO^^\&##########;LOW ORDER DATA\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 47.#^^P2C\\####^&FLGS\& .BREAK .INDEX ^^CAMAC\\ WRITE ^THIS INSTRUCTION CAUSES A LIST OF ^^CAMAC\\ WRITE COMMANDS TO BE EXECUTED WITH DATA TAKEN FROM THE ^^PDP\\ BUFFER. ^IT SHOULD BE FOLLOWED BY THE LIST OF ^^FCNA\\'S TERMINATED BY AN ^^FEND\\. ^IF EXECUTED FROM A ^^PDP\\-RESIDENT CHANNEL PROGRAM, THE DATA WORDS (ONE OR TWO) MUST FOLLOW THE ^^FCNA\\'S IN THE BUFFER, AND THE ^^CMF.QS\\ OPTION IS ^&NOT\& AVAILABLE (SINCE WRITING A VARIABLE NUMBER OF DATA WORDS WOULD UPSET THE ^^FCNA\\ SEQUENCE). ^THE ARGUMENT ^&FLGS\& IS A LIST OF 0 TO 4 OPTION BITS SEPARATED FROM EACH OTHER BY A "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING LIST: .SKIP .LEFT MARGIN 16 .INDENT -9 ^^CMF.IX\\#-#MEANING AS FOR ^M2^C .SKIP .INDENT -9 ^^CMF.QS\\#-#MEANING AS FOR ^^PM2C\\, EXCEPT THAT ONE (OR TWO) WORDS ARE READ FROM THE BUFFER AND USED EACH TIME A WRITE IS REPEATED (THE BUFFER LENGTH THEREFORE SETS AN INTRINSIC LIMIT ON HOW MANY TIMES A WRITE CAN BE REPEATED). .SKIP .INDENT -9 ^^CMF.QR\\#-#MEANING AS FOR ^M2^C .INDENT -9 .SKIP ^^CMF.24\\#-#IF SPECIFIED, TWO 16-BIT ^^PDP\\ WORDS ARE READ FROM THE BUFFER AND ASSEMBLED INTO ONE 24-BIT ^^CAMAC\\ WORD (FIRST WORD = HIGH ORDER 8 BITS, SECOND WORD = LOW ORDER 16 BITS). ^IF NOT SPECIFIED, ONE 16-BIT ^^PDP\\ WORD IS USED AND THE HIGH ORDER 8 BRANCH DATA BITS ARE SET TO ZERO. .LEFT MARGIN 4 .SKIP ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.P2C!<^&\\FLGS^^\&+0>#;DO PDP TO CAMAC WRITE\\ .SKIP .LEFT MARGIN 4 .INDENT -4 48.#^^PP2C\\####^&FLGS\& .BREAK .INDEX ^^CAMAC\\ WRITE ^THIS INSTRUCTION CAUSES A LIST OF ^^CAMAC\\ WRITE COMMANDS (^^FCNA\\'S) WITH INTERSPERSED DATA WORDS (ONE OR TWO PER ^^FCNA\\, DEPENDING ON 16 OR 24 BIT MODE) TO BE READ FROM THE ^^PDP\\ BUFFER AND EXECUTED. ^THE LIST IS TERMINATED BY A ZERO WORD. ^THIS INSTRUCTION IS IDENTICAL TO ^^P2C\\ FOR ^^PDP\\-RESIDENT CHANNEL PROGRAMS. ^THE ARGUMENT ^&FLGS\& IS A LIST OF 0 TO 4 OPTION BITS SEPARATED FROM EACH OTHER BY A "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING LIST: .SKIP .LEFT MARGIN 16 .INDENT -9 ^^CMF.IX\\#-#MEANING AS FOR ^M2^C .SKIP .INDENT -9 ^^CMF.IQ\\#-#MEANING AS FOR ^M2^C .SKIP .INDENT -9 ^^CMF.QR\\#-#MEANING AS FOR ^M2^C .SKIP .INDENT -9 ^^CMF.24\\#-#MEANING AS FOR ^P2^C .SKIP .LEFT MARGIN 4 ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PPC!<^&\\FLGS^^\&+0>#;DO PDP TO CAMAC WRITE, FCNA'S IN PDP BUFFER\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 49.#^^I2C\\#####^&FLGS\& .BREAK .INDEX ^^CAMAC\\ WRITE ^THIS INSTRUCTION CAUSES A LIST OF ^^CAMAC\\ WRITE COMMANDS TO BE EXECUTED WITH ^^FCNA\\'S AND DATA WORDS (ONE OR TWO) FOLLOWING THE INSTRUCTION ITSELF. ^THE LIST OF ^^FCNA\\'S (AND INTERSPERSED DATA) IS TERMINATED BY AN ^^FEND\\. ^IT IS EQUIVALENT TO ^M2^C FOR ^^MBD\\-RESIDENT PROGRAMS, OR TO ^P2^C FOR ^^PDP\\-RESIDENT PROGRAMS. ^THE ARGUMENT ^&FLGS\& IS A LIST OF 0 TO 4 OPTION BITS SEPARATED FROM EACH OTHER BY A "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING SET: .SKIP .LEFT MARGIN 16 .INDENT -9 ^^CMF.IX\\#-#MEANING AS FOR ^M2^C .INDENT -9 .SKIP ^^CMF.IQ\\#-#MEANING AS FOR ^M2^C .INDENT -9 .SKIP ^^CMF.QR\\#-#MEANING AS FOR ^M2^C .INDENT -9 .SKIP ^^CMF.24\\#-#MEANING AS FOR ^M2^C OR ^P2^C .SKIP .LEFT MARGIN 4 ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.I2C!<^&\\FLGS^^\&+0>#;DO IMMEDIATE TO CAMAC WRITE\\ .SKIP .LEFT MARGIN 4 .INDENT -4 50.#^^C2P\\####^&FLGS\& .BREAK .INDEX ^^CAMAC\\ READ ^THIS INSTRUCTION CAUSES A LIST OF ^^CAMAC\\ READ COMMANDS TO BE EXECUTED WITH DATA SENT TO THE ^^PDP\\ BUFFER. ^IT SHOULD BE FOLLOWED BY THE LIST OF ^^FCNA\\'S TERMINATED BY AN ^^FEND\\. ^IF EXECUTED FROM A ^^PDP\\-RESIDENT CHANNEL PROGRAM, EXTRA WORDS (ONE OR TWO PER ^^FCNA\\, DEPENDING ON 16 OR 24 BIT MODE) SHOULD BE LEFT BETWEEN THE ^^FCNA\\'S IN THE BUFFER INTO WHICH THE DATA WILL BE READ, AND THE ^^CMF.QS\\ OPTION IS ^&NOT\& AVAILABLE (SINCE READING A VARIABLE NUMBER OF DATA WORDS COULD OVERWRITE ^^FCNA\\'S). ^THE ARGUMENT ^&FLGS\& IS A LIST OF 0 TO 4 OPTION BITS SEPARATED FROM EACH OTHER BY A "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING LIST: .SKIP .LEFT MARGIN 16 .INDENT -9 ^^CMF.IX\\#-#IF NOT SPECIFIED, NO ^X RESPONSE FROM A MODULE WILL CAUSE A FATAL ERROR. ^IF SPECIFIED, ^X WILL BE IGNORED. .SKIP .INDENT -9 .INDEX ^Q-STOP MODE ^^CMF.QS\\#-#IF SPECIFIED, ^Q-STOP BLOCK TRANSFER MODE WILL BE USED, I.E., EACH READ WILL BE REPEATED IF ^Q=1 AND DATA READ SENT TO THE BUFFER UNTIL A ^Q=0 RESPONSE IS OBTAINED (LIMITED BY THE SIZE OF THE BUFFER). ^IF NOT SPECIFIED, NO ^Q RESPONSE FROM A MODULE WILL EITHER CAUSE A FATAL ERROR, OR CAUSE THE READ TO BE RETRIED. .SKIP .INDENT -9 .INDEX ^Q-REPEAT MODE ^^CMF.QR\\#-#IF SPECIFIED (AND ^^CMF.QS\\ IS ^&NOT\& SPECIFIED), ^Q-REPEAT BLOCK TRANSFER MODE WILL BE USED, I.E., EACH READ WILL BE RETRIED IF ^Q=0 UNTIL A ^Q=1 RESPONSE IS OBTAINED (THIS WILL OCCUR UP TO 65,536 TIMES, AFTER WHICH THE MODULE IS CONSIDERED INOPERATIVE AND A "NO ^Q" FATAL ERROR OCCURS). ^IF NOT SPECIFIED (AND ^^CMF.QS\\ IS ^&NOT\& SPECIFIED), NO ^Q RESPONSE WILL CAUSE A FATAL ERROR. .SKIP .INDENT -9 ^^CMF.24\\#-#IF SPECIFIED, EACH 24-BIT ^^CAMAC\\ WORD IS BROKEN UP INTO TWO 16-BIT ^^PDP\\ WORDS AND SENT TO THE BUFFER (FIRST WORD = HIGH ORDER 8 BITS, SECOND WORD = LOW ORDER 16 BITS). ^IF NOT SPECIFIED, ONLY THE LOW 16 BRANCH DATA BITS ARE SENT TO THE BUFFER AS ONE 16-BIT ^^PDP\\ WORD. .SKIP .LEFT MARGIN 4 ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.C2P!<^&\\FLGS^^\&+0>#;DO CAMAC TO PDP READ\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 51.#^^PC2P\\####^&FLGS\& .BREAK .INDEX ^^CAMAC\\ READ ^LIKE ^C2^P, EXCEPT THAT THE ^^FCNA\\ LIST IS READ FROM THE ^^PDP\\ BUFFER, AND EXTRA WORDS (ONE OR TWO) SHOULD BE INSERTED BETWEEN EACH ^^FCNA\\ INTO WHICH THE DATA WILL BE READ. ^THIS INSTRUCTION IS IDENTICAL TO ^C2^P FOR ^^PDP\\-RESIDENT CHANNEL PROGRAMS. ^THE ARGUMENT ^&FLGS\& IS A LIST OF 0 TO 4 OPTION BITS SEPARATED FROM EACH OTHER BY A "!" (LOGICAL "^O^R") OPERATOR, CHOSEN FROM THE FOLLOWING SET: .SKIP .LEFT MARGIN 16 .INDENT -9 ^^CMF.IX\\#-#MEANING AS FOR ^C2^P .SKIP .INDENT -9 ^^CMF.IQ\\#-#IF NOT SPECIFIED, NO ^Q RESPONSE FROM A MODULE WILL EITHER CAUSE A FATAL ERROR, OR CAUSE THE READ TO BE RETRIED. ^IF SPECIFIED, NO ^Q WILL BE IGNORED (AND THE DATA READ WILL BE INVALID). .SKIP .INDENT -9 ^^CMF.QR\\#-#MEANING AS FOR ^C2^P .SKIP .INDENT -9 ^^CMF.24\\#-#MEANING AS FOR ^C2^P .SKIP .LEFT MARGIN 4 ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PCP!<^&\\FLGS^^\&+0>#;DO CAMAC TO PDP READ, FCNA'S IN PDP BUFFER\\ .LEFT MARGIN 4 .INDENT -4 .SKIP 52.#^^TEST\\ .BREAK ^THIS INSTRUCTION CAUSES A ^^CAMAC\\ MODULE TO BE READ, THE DATA READ .INDEX TEST FUNCTION INTERPRETED AS A FUNCTION TO BE PERFORMED AND EXECUTED, AND THE RESULTS OF THE EXECUTED FUNCTION TO BE WRITTEN INTO A ^^CAMAC\\ MODULE. ^IT IS INTENDED TO BE USED FOR DEBUGGING AND MANUAL INTERVENTION IN .INDEX TEST MODULE CONJUNCTION WITH A TEST MODULE WHICH HAS 24 SWITCHES THAT CAN BE READ AND 24 LIGHTS OR A SIMILAR DISPLAY WHICH CAN BE WRITTEN. ^THE ^^TEST\\ INSTRUCTION IS FOLLOWED BY TWO ^^FCNA\\ WORDS, ONE FOR READING THE SWITCHES, THE SECOND FOR WRITING THE LIGHTS. ^THE SWITCHES READ (NUMBERED 1 TO 24, 1 BEING THE LOW ORDER) ARE INTERPRETED AS FOLLOWS: .SKIP .LEFT MARGIN 12 .INDENT -8 24-22: CHANNEL NUMBER. ^THE TEST FUNCTION IS NOT PERFORMED UNLESS THE NUMBER (0 TO 7) IN THESE SWITCHES CORRESPONDS TO THE CHANNEL EXECUTING THE ^^TEST\\ INSTRUCTION. ^THIS ALLOWS ^^TEST\\ INSTRUCTIONS USING THE SAME MODULE TO APPEAR IN MULTIPLE CHANNEL PROGRAMS; THE SETTING OF THESE SWITCHES DETERMINES TO WHICH CHANNEL THE TEST FUNCTION APPLIES. .INDENT -8 .SKIP 21-20: FUNCTION CODE, AS FOLLOWS: .SKIP .LEFT MARGIN 4 ^^^&FUNCTION#SW.#21#SW.#20##############RESULT\&\\ .LEFT MARGIN 29 .INDENT -25 .SKIP ###1########0######0#####^EXAMINE ^^MBD\\ MEMORY LOCATION. .SKIP .INDENT -25 ###2########0######1#####^EXECUTE ^^CAMAC\\ READ OR WRITE COMMAND. .INDENT -25 .SKIP ###3########1######0#####^EXECUTE ^^CAMAC\\ CONTROL COMMAND. .INDENT -25 .SKIP ###4########1######1#####^DEPOSIT IN ^^MBD\\ MEMORY LOCATION OR SIGNAL ERROR. .SKIP .LEFT MARGIN 12 .INDENT -5 .INDEX TEST ADDRESS 19: INCREMENT TEST ADDRESS (^T^A) REGISTER BEFORE EXECUTING FUNCTION. .SKIP .INDENT -5 18: DECREMENT TEST ADDRESS (^T^A) REGISTER BEFORE EXECUTING FUNCTION. .SKIP .INDENT -5 17: LOAD TEST ADDRESS (^T^A) REGISTER FROM SWITCHES 1-16 BEFORE EXECUTING FUNCTION. .SKIP .INDENT -7 16-1: NEW TEST ADDRESS (^T^A) VALUE IF SWITCH 17 ON; DATA FOR FUNCTION BEING EXECUTED. .LEFT MARGIN 4 .PARAGRAPH ^THERE IS A SINGLE TEST ADDRESS (^T^A) REGISTER SHARED BY ALL CHANNELS WHICH IS USED AS THE ^^MBD\\ ADDRESS TO EXAMINE OR DEPOSIT (FUNCTIONS 1 AND 4) OR THE ^^CAMAC FCNA\\ TO BE EXECUTED (FUNCTIONS 2 AND 3). ^IT CAN BE LOADED FROM SWITCHES 16-1 IF SWITCH 17 IS ON, OR INCREMENTED OR DECREMENTED BY 1 IF SWITCHES 19 OR 18 ARE ON (USEFUL FOR EXAMINING OR DEPOSITING SUCCESSIVE ^^MBD\\ ADDRESSES, READING OR WRITING SUCCESSIVE SUBADDRESSES OF A ^^CAMAC\\ MODULE, ETC.). ^IF MORE THAN ONE OF SWITCHES 17, 18, AND 19 ARE ON, THE ORDER OF EXECUTION IS: LOAD ^T^A, DECREMENT ^T^A, INCREMENT ^T^A. .PARAGRAPH ^A DETAILED DESCRIPTION OF THE FUNCTIONS FOLLOWS. .SKIP .LEFT MARGIN 26 .INDENT -22 1. ^EXAMINE.##########^THE ^T^A SPECIFIES THE ^^MBD\\ ADDRESS TO BE EXAMINED (ALL ADDRESSES VALID), AND MAY BE SPECIFIED BY SWITCHES 16-1 IF SWITCH 17 IS TURNED ON. ^THE CONTENTS OF THE ^^MBD\\ LOCATION WILL BE DISPLAYED IN LIGHTS 16-1. ^LIGHTS 24-17 WILL REFLECT THE CONTENTS OF SWITCHES 24-17. .SKIP .INDENT -22 2. ^^CAMAC\\ READ/WRITE.#^THE ^T^A SPECIFIES THE ^^CAMAC FCNA\\ COMMAND (MINUS THE ^F8 BIT, I.E., STANDARD ^^MBD\\ FORMAT). ^IF ^F16 IS ON (WRITE), THE LOW ORDER 16 BITS OF THE DATA TO BE WRITTEN WILL BE TAKEN FROM SWITCHES 16-1 AND THE HIGH ORDER 8 BITS OF DATA WRITTEN WILL BE ZERO (LIMITATION). ^IF ^F16 IS OFF (READ), SWITCHES 16-1 MAY BE USED TO SPECIFY THE ^^FCNA\\ (IN THE ORDER ^^F16, F4, F2, F1, C4, C2, C1, N16, N8, N4, N2, N1, A8, A4, A2\\, AND ^A1) IF SWITCH 17 IS TURNED ON. ^THE DATA READ OR WRITTEN WILL BE DISPLAYED IN LIGHTS 24-1 AFTER THE OPERATION IF A ^Q=1 RESPONSE WAS OBTAINED (ELSE THE CONTENTS OF THE LIGHTS REMAIN UNCHANGED). .SKIP .INDENT -22 3. ^^CAMAC\\ CONTROL.####^THE ^T^A SPECIFIES THE ^^CAMAC FCNA\\ COMMAND (MINUS THE ^F8 BIT, I.E., STANDARD ^^MBD\\ FORMAT), AND WILL BE DISPLAYED IN LIGHTS 16-1. ^IT MAY BE SPECIFIED BY SWITCHES 16-1 IF SWITCH 17 IS TURNED ON. ^LIGHT 17 DISPLAYS THE "^X" RESPONSE OF THE MODULE, AND LIGHT 18 DISPLAYS THE "^Q" RESPONSE. ^LIGHTS 19-24 WILL BE TURNED OFF. .SKIP .INDENT -22 4. ^DEPOSIT.##########^SWITCH 17 ^&MUST\& BE OFF OR THE DEPOSIT WILL NOT BE PERFORMED. ^THE ^T^A SPECIFIES THE ^^MBD\\ ADDRESS TO BE DEPOSITED INTO, AND MUST BE WITHIN THE AREA BETWEEN THE TOP OF THE ^^MBD\\ EXECUTIVE AND THE TOP OF MEMORY OR THE DEPOSIT WILL NOT BE PERFORMED. ^THE DATA TO BE DEPOSITED IS TAKEN FROM SWITCHES 16-1. ^THE ^T^A (ADDRESS DEPOSITED) WILL BE DISPLAYED IN LIGHTS 16-1 IF THE DEPOSIT IS PERFORMED, AND LIGHTS 24-17 WILL REFLECT THE CONTENTS OF SWITCHES 24-17. .SKIP .INDENT -22 5. ^SIGNAL ERROR.#####^IF ^&ALL\& SWITCHES 21-1 ARE ON, A MANUAL FATAL ERROR, CODE ^^CE.MAN\\, WILL BE SIGNALLED WITH ERROR INFORMATION WORD EQUAL TO THE "WRITE INTO LIGHTS" ^^FCNA\\. ^THIS CAUSES THE CHANNEL EXECUTING .INDEX ERROR EXIT ^^TEST\\ TO GO TO THE ERROR EXIT ADDRESS, OR IF NONE EXISTS, TO STOP. ^THE LIGHTS ARE UNAFFECTED. .LEFT MARGIN 4 .PARAGRAPH ^IF NO ^Q RESPONSE IS OBTAINED FROM THE "READ SWITCHES" ^^CAMAC\\ COMMAND, THE TEST FUNCTION WILL NOT BE PERFORMED BUT NO ERROR WILL RESULT (THE ^X LINE IS ALWAYS IGNORED). ^THIS ALLOWS THE TEST MODULE TO BE DISCONNECTED FROM THE BRANCH IF DESIRED WITHOUT AFFECTING CHANNEL PROGRAMS THAT INCLUDE A TEST FUNCTION FOR DEBUGGING PURPOSES. .SKIP ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.TST##########;DO TEST MODULE FUNCTION\\ .SKIP .LEFT MARGIN 4 .INDENT -4 53.#^^PTEST\\ .BREAK ^SAME AS ^^TEST\\, EXCEPT THAT THE TWO ^^FCNA\\'S ARE READ FROM THE ^^PDP\\ BUFFER (IDENTICAL FOR ^^PDP\\-RESIDENT CHANNEL PROGRAMS). .BREAK ^MACRO EXPANSION: .BREAK .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.PTS##########;DO TEST MODULE FUNCTION, FCNA'S IN PDP BUFFER\\ .LEFT MARGIN 0 .PARAGRAPH ^THE REMAINING CHANNEL INSTRUCTION ARE SPECIALLY INCLUDED TO SATISFY THE NEEDS OF EXPERIMENT ^R209. .SKIP .LEFT MARGIN 4 .INDENT -4 54.#^^HOD2P\\####^&BASE\& .BREAK .INDEX ^^TDC\\ COMPRESSION ^THIS INSTRUCTION READS OUT A SET OF HODOSCOPE ^^TDC\\'S AND COMPRESSES THE DATA BY PASSING TO THE ^^PDP\\-11 ONLY THOSE ^^TDC\\'S WITH VALID DATA (VALUE LESS THAN 512 AND GREATER THAN ZERO); A ^^TDC\\ NUMBER (ASSOCIATED CONSECUTIVELY WITH EACH ENTRY IN THE ^^FCNA\\ LIST) IS ALSO WRITTEN OUT TO IDENTIFY THE DATA SENT TO THE BUFFER (I.E., TWO WORDS ARE USED PER ^^TDC\\). ^THE ^^HOD2P\\ INSTRUCTION IS FOLLOWED BY A LIST OF ^^FCNA\\'S WHICH DEFINE THE ^^TDC\\'S TO BE READ, TERMINATED BY AN ^^FEND\\. ^&^BASE\& IS THE STARTING ^^TDC\\ NUMBER TO BE ASSIGNED TO THE FIRST ^^TDC\\ READ. ^NO ^X OR NO ^Q RESPONSE ALWAYS CAUSE A FATAL ERROR. ^IF THERE IS NO MORE ROOM FOR DATA IN THE ^^PDP\\ BUFFER, A NON-FATAL COMPLETION CODE ^^CE.NRM\\ IS GENERATED AND READING STOPS (I.E., THE EVENT IS TRUNCATED BUT OTHERWISE ACCEPTABLE). ^THIS INSTRUCTION IS INVALID IN A ^^PDP\\-RESIDENT CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.HOD##########;READ OUT HODOSCOPE TDC DATA .INDENT -33 ########.WORD###^&\\BASE^^\&############;BASE (STARTING) TDC NUMBER\\ .SKIP .LEFT MARGIN 4 .INDENT -4 55.#^^DRC2P\\####^&BASE\& .BREAK .INDEX ^LECROY 2770 ^THIS INSTRUCTION READS OUT A SET OF ^LECROY 2770 DRIFT CHAMBER TIME DIGITIZER MODULES. ^IT IS FOLLOWED BY A LIST OF ^^FCNA\\'S (WITH FUNCTION ^F(2) = READ AND CLEAR) WHICH DEFINE THE 2770'S TO BE READ, TERMINATED BY AN ^^FEND\\. ^&^BASE\& IS THE STARTING WIRE ADDRESS TO BE ASSIGNED TO THE FIRST WIRE OF THE FIRST 2770. ^DRIFT CHAMBER DATA WORDS ARE READ FROM EACH 2770 UNTIL A FLAG WORD (HIGH ORDER BIT ON) IS READ. ^THE WIRE NUMBER PART OF EACH WORD READ IS CHECKED TO SEE IF IT IS EVEN OR ODD. ^IF EVEN, IT IS DIVIDED BY 2, THE BASE WIRE NUMBER IS ADDED, AND THE RESULT IS STORED IN THE FIRST OF TWO BUFFERS IN ^^MBD\\ MEMORY, FOLLOWED BY THE TIME-OF-FLIGHT PART OF THE WORD READ (I.E., TWO WORDS ARE USED PER WIRE). ^IF ODD, IT IS DECREMENTED AND DIVIDED BY 2, THEN 48 IS ADDED (HALF THE NUMBER OF WIRES IN EACH 2770); THE BASE WIRE NUMBER IS ALSO ADDED AND THE RESULT IS STORED IN THE SECOND OF TWO BUFFERS IN ^^MBD\\ MEMORY. ^THUS THE CONVERSION IS MADE FROM 2770 ADDRESS TO INPUT PIN NUMBER. ^NO ^X RESPONSE FROM A 2770 (IMPLYING A MISSING MODULE) CAUSES THE READ-IN OF THAT MODULE TO BE SKIPPED; THE FUNCTION CONTINUES WITH THE NEXT MODULE ^^FCNA\\ WHILE RETAINING THE SEQUENCE OF WIRE NUMBERS ASSIGNED TO EACH MODULE. ^NO ^Q RESPONSE ALWAYS CAUSES A FATAL ERROR (IT IMPLIES NO COMMON STOP PULSE WAS RECEIVED). ^WHEN ALL WIRES HAVE BEEN READ IN A 2770, THE CONTENTS (IF ANY) OF FIRST BUFFER ONE AND THEN BUFFER TWO ARE SEQUENTIALLY TRANSFERED TO THE ^^PDP\\ BUFFER. ^AS EACH WIRE NUMBER IS TRANSFERED, IT IS COMPARED WITH THE PREVIOUS AND A NON-FATAL ERROR IS GENERATED IF IT IS LESS THAN OR EQUAL TO THE LAST WIRE NUMBER. ^IF THERE IS NO MORE ROOM FOR DATA IN THE ^^PDP\\ BUFFER, A NON-FATAL COMPLETION CODE ^^CE.NRM\\ IS GENERATED AND READING STOPS AS FOR THE ^^HOD2P\\ INSTRUCTION. ^WHEN THE END OF ONE 2770 IS REACHED, THE BASE WIRE ADDRESS IS INCREMENTED BY 96 (THE NUMBER OF WIRES IN EACH 2770) AND READOUT OF THE NEXT 2770 COMMENCES. ^THE ^^DRC2P\\ INSTRUCTION CHECKS THAT THE FUNCTION CODES IN THE ^F^C^N^A'S ARE IN THE RANGE 0 TO 7 (^^CAMAC\\ READS); IF THEY ARE NOT, A CONTROL FUNCTION IS PERFORMED (^F8=1) USING THE GIVEN ^F^C^N^A; ANY ERRORS (SUCH AS NO ^Q OR NO ^X RESPONSE) ARE IGNORED FOR THIS CONTROL OPERATION. ^THE INSTRUCTION EXECUTION THEN CONTINUES WITH THE NEXT ^F^C^N^A IN THE LIST. ^THIS ALLOWS SIMPLE CONTROL OPERATIONS TO BE INTERSPERSED WITH DRIFT CHAMBER READOUT COMMANDS. ^SINCE EXPERIMENT ^R209 REQUIRES 9 CRATES OF 2770'S (MORE THAN CAN BE ADDRESSED ON A SINGLE BRANCH HIGHWAY), 2 ^C^E^R^N BRANCH SELECTOR UNITS (^B^S^U'S) ARE EMPLOYED AND THE BRANCH SELECTION (^N(31)^F(26)) COMMANDS ARE INTERSPERSED WITH 2770 READOUT COMMANDS WHERE NECESSARY TO CHANGE BRANCHES TO ACCESS A DIFFERENT SET OF CRATES. ^THE ^^DRC2P\\ INSTRUCTION IS INVALID IN A ^^PDP\\-RESIDENT CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.DRC##########;READ OUT LECROY 2770 DRIFT CHAMBER DATA .INDENT -33 ########.WORD###^&\\BASE^^\&############;BASE (STARTING) WIRE NUMBER\\ .SKIP .LEFT MARGIN 4 .INDENT -4 56.#^^TOFCUT\\####^&ADDR\&,^&TDIF\&,^&TWID\& .BREAK ^THIS INSTRUCTION CAUSES SELECTED ^^TDC\\ MODULES TO BE READ (BUT NOT .INDEX TIMING CUTS CLEARED) AND TIMING CUTS APPLIED (INTENDED TO AVOID READING OUT COSMIC RAY EVENTS). ^IT IS FOLLOWED BY A LIST OF ^^CAMAC FCNA\\'S (WITH FUNCTION ^F(0) = READ) WHICH DEFINE THE ^^TDC\\ MODULES TO BE READ, ARRANGED IN PAIRS (EACH ELEMENT OF THE PAIR BEING ONE END OF A SINGLE SCINTILLATION COUNTER, USED FOR MEAN TIMING), AND TERMINATED BY AN ^^FEND\\. ^&^THE ^^FCNA\\'S MUST BE ARRANGED TO DEFINE COUNTERS IN TOP-TO-BOTTOM ORDER\&, I.E., THE LATEST TIMES (FOR COSMIC RAYS) COMING LAST. ^EACH PAIR OF ^^TDC\\'S IS READ AND ONLY IF ^&BOTH\& READ LESS THAN ^^TDCDMX\\ (AN ASSEMBLY PARAMETER) IS THEIR TIMING CHECKED. ^THE FOLLOWING WEIGHTED MEAN TIME IS CALCULATED FOR ^^TDC\\ PAIR "I" (^^TDC\\ VALUES ^XI AND ^YI): ^TI = ^XI + 2 * ^YI. ^THIS TIME IS THEN COMPARED WITH ALL PREVIOUSLY OBTAINED MEAN TIMES FROM ^^TDC\\ PAIRS "J" BY MAKING THE FOLLOWING TEST (NOTE THAT ^TI > ^TJ FOR COSMIC RAYS): .SKIP ########^^ABS\\(^TI#-#^TJ#-#^&TDIF\&)#>#^&TWID\&, .SKIP WHERE ^&TDIF\& IS THRICE THE AVERAGE TIME DIFFERENCE FOR COSMIC RAYS (ZERO IS THE AVERAGE FOR PARTICLES COMING FROM THE INTERSECTION REGION) AND ^&TWID\& IS THRICE THE WIDTH OF THE TIME DISTRIBUTION (CUT POINT), BOTH GIVEN IN ^^TDC\\ UNITS (200 PS PER UNIT). ^IF THE ABOVE CONDITION IS ^&NOT\& SATISFIED, AN IMMEDIATE BRANCH IS MADE TO LOCATION ^&ADDR\& (REJECT EVENT EXIT). ^OTHERWISE THE NEW TIME ^TI IS ADDED TO THE TABLE OF TIME VALUES IF THERE IS ROOM AND THE NEXT ^^TDC\\ PAIR IS READ. (THE TABLE HAS ROOM FOR 6 VALUES, I.E., 6 TRACKS IGNORING SHOWERS IN ADJACENT HODOSCOPE ELEMENTS). ^WHEN ALL ^^TDC\\ PAIRS HAVE BEEN SUCCESFULLY READ, THE ^^TOFCUT\\ INSTRUCTION COMPLETES NORMALLY (KEEP EVENT EXIT). ^THIS INSTRUCTION IS INVALID IN A ^^PDP\\-RESIDENT CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 ^^########.WORD###CM.TOF##########;DO TOF CUT ON HODOSCOPE TDC DATA .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;REJECT BRANCH OFFSET .INDENT -33 ########.WORD###^&\\TDIF^^\&############;TIME DIFFERENCE FOR COSMIC RAYS * 3 .INDENT -33 ########.WORD###^&\\TWID^^\&############;WIDTH OF TOF DISTRIBUTION * 3\\ .SKIP .LEFT MARGIN 4 .INDENT -4 57.#^^PHIMAT\\####^&ADDR\& .BREAK ^THIS INSTRUCTION CAUSES SELECTED ^^TDC\\ MODULES TO BE READ (BUT NOT CLEARED), CHECKED FOR VALID DATA (WITHIN A CERTAIN SET OF LIMITS SET AS ASSEMBLY PARAMETERS ^^TDCMIN\\ AND ^^TDCMAX\\), AND COINCIDENCES .INDEX PHI MATCHING FORMED BETWEEN THOSE WHICH REPRESENT HODOSCOPE ELEMENTS AT 180 DEGREE PHI ANGLES PLUS OR MINUS SOME AMOUNT. ^IT IS FOLLOWED BY ^^CAMAC FCNA\\'S (WITH FUNCTION ^F(0) = READ) WHICH DEFINE THE ^^TDC\\'S TO BE READ, ARRANGED IN GROUPS OF FOUR SUBGROUPS EACH, CORRESPONDING TO ^^D, E, B\\, AND ^C COUNTERS. ^EACH SUBGROUP IS TERMINATED BY AN ^^FEND\\, EXCEPT THE LAST FOR EACH GROUP, WHICH IS TERMINATED WITH A ^^GEND\\. ^THE ENTIRE LIST IS TERMINATED BY A ^^PHIEND\\ , AND THE LAST GROUP TO SEARCH FOR THE FIRST TRACK IS TERMINATED BY A ^^PHIMID\\. ^IF A SET OF MATCHING TRACKS IS FOUND, THE INSTRUCTION COMPLETES NORMALLY (KEEP EVENT EXIT). ^IF THE FIRST TRACK SEARCH REACHES THE ^^PHIMID\\, A BRANCH IS MADE TO LOCATION ^&ADDR\& (REJECT EVENT EXIT). ^THIS INSTRUCTION IS INVALID IN A ^^PDP\\ CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 .SKIP ^^########.WORD###CM.PHI##########;DO PHI-MATCHING .INDENT -33 ########.WORD###<^&\\ADDR^^\&-.-2>/2####;REJECT BRANCH OFFSET\\ .SKIP .LEFT MARGIN 0 58.#^^WRTMEM\\####^&CF\&,^&CC\&,^&CN\&,^&CA\& .BREAK ^THIS INSTRUCTION CAUSES THE CURRENT CONTENTS OF THE ^^PDP\\ BUFFER TO BE WRITTEN INTO A ^^FIFO\\ MEMORY USED AS A DATA LINK FOR TRANSMISSION OF EVENT DATA TO ANOTHER COMPUTER SYSTEM (THE MEMORY IS KEPT IN A "COMMON" CRATE WHICH IS SHARED BETWEEN THIS AND THE OTHER ^^CAMAC\\ SYSTEM BY MEANS OF A ^^CERN\\ BRANCH MIXER UNIT). ^THE FIRST THREE WORDS OF THE MEMORY ARE LOADED WITH AN EVENT HEADER, THEN THE ENTIRE CONTENTS OF THE ^P^D^P BUFFER FROM ITS STARTING POINT UP TO THE LAST WORD USED (AS INDICATED BY THE CURRENT POSITION OF THE ^^PDP\\ BUFFER POINTER) IS LOADED INTO THE FOURTH AND FOLLOWING WORDS OF THE MEMORY. ^THE 3-WORD HEADER CONSISTS OF A LENGTH WORD, INDICATING THE TOTAL LENGTH OF THE DATA IN THE MEMORY (3 PLUS THE LENGTH OF THE ^^PDP\\ BUFFER DATA); THE CURRENT ^^MBD\\ COMPLETION CODE (AS SET BY ERROR TRAPS); AND THE CURRENT ERROR INFORMATION WORD (ALSO SET BY ERROR TRAPS). ^A NO "^Q" RESPONSE FROM THE MEMORY IS A FATAL ERROR. ^&^CF\&, ^&CC\&, ^&CN\&, AND ^&CA\& ARE THE FUNCTION, CRATE, STATION, AND SUBADDRESS USED TO DO THE MEMORY WRITING (NOTE THAT THE SUBADDRESS IS NOT INCREMENTED WHILE WRITING; THE MEMORY MUST STORE EACH WORD WRITTEN IN A SEPERATE LOCATION BY USING ITS OWN INTERNAL LOGIC). ^THIS INSTRUCTION IS INVALID IN A ^^PDP\\ CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 .SKIP ^^########.WORD###CM.WRM##########;WRITE LINK MEMORY .INDENT -33 ########FCNA####\\^&CF\&,^&CC\&,^&CN\&,^&CA\&^^#####;WRITE COMMAND\\ .SKIP .LEFT MARGIN 0 59.#^^NUMTST\\####^&ADDR\&,^&NMBR\& .BREAK ^THIS INSTRUCTION IS USED TO REJECT EVENTS WHICH HAVE TOO FEW CHAMBER WIRES OR HODOSCOPE ELEMENTS TO BE RECONSTRUCTABLE, BY PLACING A CUT ON THE TOTAL EVENT LENGTH. ^IT COMPUTES THE NUMBER OF WORDS USED IN THE ^P^D^P BUFFER AND COMPARES THIS WITH ^&NMBR\&. ^IF GREATER OR EQUAL, THE INSTRUCTION COMPLETES NORMALLY (KEEP EVENT EXIT). ^IF LESS, THE ^P^D^P BUFFER POINTER IS RESET TO THE SECOND WORD OF THE BUFFER (BECAUSE THE FIRST WORD IS USED BY THE ^^WDCNT\\ INSTRUCTION) AND A BRANCH IS MADE TO LOCATION ^&ADDR\& (REJECT EVENT EXIT). ^THIS INSTRUCTION IS INVALID IN A ^P^D^P CHANNEL PROGRAM. .BREAK ^MACRO EXPANSION: .LEFT MARGIN 33 .INDENT -33 .SKIP ^^########.WORD###CM.NUM##########;TEST NO. OF WORDS IN BUFFER .INDENT -33 ########.WORD###<\\^&ADDR\&^^-.-2>/2####;REJECT BRANCH OFFSET .INDENT -33 ########.WORD###\\^&NMBR\&^^############;MINIMUM NO. OF WORDS FOR GOOD EVENT\\ .SKIP .LEFT MARGIN 0 .PARAGRAPH ^FINALLY, IT SHOULD BE NOTED THAT THE ^^MBD\\ EXECUTIVE IS MODULAR IN .INDEX FUNCTION ROUTINES STRUCTURE SO THAT ADDITIONAL FUNCTION ROUTINES CAN EASILY BE ADDED TO IMPLEMENT MORE CHANNEL INSTRUCTIONS. ^IN ORDER TO DO SO, HOWEVER, CERTAIN REGISTER CONVENTIONS MUST BE OBSERVED. ^THE ^^MBD\\ EXECUTIVE USES .INDEX FILE REGISTERS THE FOLLOWING FILE REGISTERS, WHICH CANNOT BE USED FOR OTHER PURPOSES BY FUNCTION ROUTINES: .BREAK .LEFT MARGIN 12 .SKIP .INDENT -12 ^BANK 0 ^^ILR\\:#^^MBD\\ PROGRAM'S "PROGRAM COUNTER": USED TO FETCH INSTRUCTIONS AND DATA FROM ^^MBD\\ MEMORY. .INDENT -12 .SKIP .INDEX ^^PDP\\ BUFFER ^BANK 0 ^^DAR\\:#^^PDP\\ BUFFER POINTER AND ^^PDP\\ PROGRAM'S "PROGRAM COUNTER": USED FOR TRANSFERS TO/FROM THE ^^PDP\\ BUFFER. .SKIP .INDENT -12 .INDEX ERROR EXIT ^BANK 1 ^^ILR\\:#^^PDP\\ ERROR EXIT ADDRESS: THE ADDRESS WITHIN THE ^^PDP\\ BUFFER TO BRANCH TO ON ERROR. .SKIP .INDENT -12 ^BANK 1 ^^CTR\\:#^^MBD\\ ERROR EXIT ADDRESS: THE ^^MBD\\ ADDRESS TO BRANCH TO ON ERROR. .SKIP .INDENT -12 ^BANK 1 ^^DAR\\:#STARTING ^^PDR\\ VALUE PLUS ONE: ZERO IF CHANNEL DOING AN ABORT REQUEST; ELSE SPECIFIES THE ADDRESS OF THE SECOND WORD .INDEX BUFFER HEADER OF THE ^^PDP\\ BUFFER HEADER (THE BUFFER ITSELF BEGINS WITH THE NEXT WORD). .SKIP .INDENT -12 ^BANK 1 ^^WCR\\:#THE ADDRESS OF THE LAST WORD IN THE ^^PDP\\ BUFFER. .SKIP .INDENT -12 .INDEX COMPLETION CODE ^BANK 1 ^^GP1\\:#THE CHANNEL COMPLETION CODE (INITIALIZED TO ^^IS.SUC\\ = +1). .SKIP .INDENT -12 .INDEX ERROR INFORMATION WORD ^BANK 1 ^^CCR\\:#THE CHANNEL ERROR INFORMATION WORD (SET BY ERROR TRAPS). .SKIP .INDENT -12 .INDEX LOOP COUNT ^BANK 1 ^^GP2\\:#THE CHANNEL LOOP COUNTER (FOR ^^CM.LCO\\ AND ^^CM.DCB\\ AND ^^CM.JPC\\ INSTRUCTIONS). .LEFT MARGIN 0 .PARAGRAPH ^THE BANK 0 ^^WCR\\ AND ^^CTR\\ CONTAIN (IN BITS 12-15), ON ENTRY TO A FUNCTION ROUTINE, BITS 12-15 OF THE CHANNEL INSTRUCTION BEING EXECUTED (FLAG BITS); THESE MAY BE TESTED BY ^C12-^C15 CONDITION TESTS. ^BITS 0-11 OF THE ^^CTR\\ ARE THE FUNCTION ROUTINE'S ADDRESS. ^THESE REGISTERS AND BANK 0 ^^CCR, GP1\\, AND ^^GP2\\ CAN BE USED BY FUNCTION ROUTINES FOR ANY PURPOSE. ^THE BANK 0 ^^CCR\\ IS USED AS THE ERROR INFORMATION WORD IF AN ERROR EXIT IS TAKEN (IT IS COPIED INTO THE BANK 1 ^^CCR\\). .LEFT MARGIN 0 .SUBTITLE ^^CAMAC SYSTEM COMPLETION CODES\\ .PAGE .INDEX COMPLETION CODE ^^E. ^&CAMAC SYSTEM COMPLETION CODES\&\\ .PARAGRAPH ^THE FOLLOWING COMPLETION CODE VALUES MAY BE RETURNED BY ^^QIO\\'S DIRECTED TO .INDEX ^I/^O STATUS BLOCK AN ^^MBD\\ (IN THE FIRST BYTE OF THE ^I/^O STATUS BLOCK). ^THE CONTENTS OF THE SECOND WORD OF THE ^I/^O STATUS BLOCK IS ALSO DESCRIBED. .SKIP ^^^&#CODE##VALUE#FUNCTN##IOSB WORD 2########DESCRIPTION\&\\ .SKIP .LEFT MARGIN 34 .INDENT -34 ^^IS.SUC\\##+01###ANY####BYTES#TRSFD##^SUCCESSFUL COMPLETION. .INDENT -34 ^^CE.NRM\\##+02###ANY####BYTES#TRSFD##^NOT ENOUGH ROOM FOR DATA; EVENT TRUNCATED. .INDENT -34 ^^CE.ORD##+03##CM.DRC\\##BYTES#TRSFD##^DRIFT CHAMBER WIRE NUMBERS NOT IN INCREASING ORDER; EVENT TRUNCATED. .INDENT -34 ^^IS.PND\\##+00###ANY#########0#######^OPERATION PENDING (QUEUED OR IN PROGRESS). .INDENT -34 ^^IE.BAD##-01##IO.WLB\\#######0#######^INCORRECT WORD COUNT IN ^^MBD\\ LOAD IMAGE. .INDENT -34 .INDEX ^^QIO\\ ^^IE.IFC\\##-02####?##########0#######^INVALID ^I/^O FUNCTION CODE IN ^^QIO\\. .INDENT -34 .INDEX CHANNEL INITIATION ^^IE.DNR##-03##IO.RLB\\#######0#######^CHANNEL INITIATE FAILED IN 5 ATTEMPTS (^^MBD\\ READY BIT OFF). .INDENT -34 ^^IE.ONP##-05##IO.RLB\\##WRDS#IN#BUF##^^MBD\\ PROGRAM EXITED WITHOUT WRITING OUT COMPLETION CODE (VIA "^^CM.EXI\\" OR "^^CM.INT\\"); OR ^^MBD\\ NOT LOADED. .INDENT -34 .INDEX ^^PDP\\ BUFFER ^^IE.SPC\\##-06###ANY#########0#######^IMPROPER USER BUFFER ADDRESS OR LENGTH. .INDENT -34 ^^IE.DNA##-07##IO.DET\\#######0#######^DETACH FAILED: DEVICE NOT ATTACHED. .INDENT -34 ^^IE.DAA##-08##IO.ATT\\#######0#######^ATTACH FAILED: DEVICE ALREADY ATTACHED. .INDENT -34 ^^IE.WLK##-12##IO.WLB\\#######0#######^^MBD\\ CANNOT BE LOADED; ACTIVE CHANNELS. .INDENT -34 ^^IE.DAO##-13##IO.WLB\\#######0#######^^MBD\\ LOAD IMAGE LONGER THAN ^^MBD\\ MEMORY SIZE. .INDENT -34 ^^IE.ABO##-15##IO.RLB\\#######0#######^^MBD\\ CHANNEL ABORTED BY KILL ^I/^O OR ^I/^O RUNDOWN. .INDENT -34 ^^IE.PRI\\##-16###ANY#########0#######^PRIVILEGE VIOLATION. .INDENT -34 ^^IE.RSU##-17##IO.RLB\\#######0#######^ACTIVE CHANNELS IN ^^MBD\\ USING OTHER 64^K MEMORY BANK; TRY AGAIN LATER .INDENT -34 .INDEX BUFFER HEADER ^^IE.OVR##-18##IO.RLB\\##BYTES#TRSFD##^ERROR RESTORING BUFFER HEADER WORDS. .INDENT -34 ^^IE.BYT\\##-19###ANY#########0#######^ODD BYTE COUNT OR VIRTUAL BUFFER ADDRESS. .INDENT -34 .INDEX CONNECT TO INTERRUPT ^^IE.CON##-22##IO.RLB\\#######0#######^CONNECT TO INTERRUPT FAILED. .INDENT -34 ^^IE.BBE##-56##IO.WLB\\##BYTES#TRSFD##^^MBD\\ MEMORY LOCATION READ BACK WRONG AFTER LOAD. .INDENT -34 ^^IE.FHE##-59##IO.RLB\\#######0#######^CHANNEL PREMATURELY TERMINATED BY ^^MBD\\ RESET. .INDENT -34 ^^IE.OFL##-65##IO.RLB\\#######0#######^POWER FAILED; OPERATION TERMINATED; ^^MBD\\ MUST BE RELOADED. .INDENT -34 ^^CE.MAN##-93##CM.TST\\##TEST#^^FCNA\\####^CHANNEL TERMINATED BY .INDEX TEST MODULE MANUAL REQUEST (TEST MODULE). .INDENT -34 .INDEX ^^PDP\\ BUFFER ^^CE.EOB\\##-94###ANY####UNDEFINED####^END OF ^^PDP\\ BUFFER REACHED. .INDENT -34 ^^CE.NOX\\##-95###ANY####BAD#^^FCNA\\#####^NO "^X" RESPONSE FROM ^^CAMAC\\ MODULE. .INDENT -34 ^^CE.NOQ\\##-96###ANY####BAD#^^FCNA\\#####^NO "^Q" RESPONSE FROM ^^CAMAC\\ MODULE. .INDENT -34 ^^CE.ADR\\##-97###ANY####^^MBD\\#ADDR#####^BAD ^^MBD\\ ADDRESS: CAN'T DEPOSIT WORD (INSIDE OF EXECUTIVE OR OUTSIDE OF AVAILABLE MEMORY). .INDENT -34 ^^CE.OUT\\##-98###ANY####^^PDP\\#WD#ADDR##^^PDP\\ BUFFER POINTER OUT OF RANGE (TOO BIG OR TOO SMALL). .INDENT -34 .INDEX CHANNEL INSTRUCTIONS ^^CE.INV\\##-99####?#####BAD#OPCODE###^INVALID INSTRUCTION IN CHANNEL PROGRAM; OR CHANNEL PROGRAM NOT LOADED FOR THIS CHANNEL. .LEFT MARGIN 0 .SUBTITLE ^^TIMING ESTIMATES\\ .PAGE ^^F. ^&TIMING ESTIMATES\&\\ .PARAGRAPH .INDEX ^^QIO\\ ^EXECUTION OF AN ^^MBD\\ OPERATION COMMENCES WITH AN ^^RSX QIO\\ DIRECTIVE AND COMPLETES WHEN THE ^I/^O EVENT FLAG IS SET AND THE ORIGINATING TASK IS RESUMED (IF IT WAS WAITING ON THE EVENT FLAG). ^THIS TIME INTERVAL .INDEX CHANNEL PROGRAM FOR ^^IO.RLB\\ REQUESTS (THOSE THAT RUN CHANNEL PROGRAMS) CAN BE DIVIDED INTO THE FOLLOWING PARTS: .SKIP .LEFT MARGIN 4 .INDENT -4 1. ^^QIO\\ DIRECTIVE: PUSHING ARGUMENTS ONTO THE STACK; EMULATOR TRAP; MODE SWITCH (USER -> KERNEL MODE); ^^DPB\\ DECODING; OBTAINING AN ^^IRQ\\ NODE FROM THE POOL, FILLING IT, AND INSERTING IT IN THE QUEUE ACCORDING TO PRIORITY; CONSTRUCTING FORWARD AND BACKWARD LINKAGES; UPDATING THE FREE NODES BIT MAP; NODE ACCOUNTING; INCREMENTING THE ^I/^O PENDING COUNT; POPPING THE ^^DPB\\ FROM THE STACK; SETTING THE ^^DSW\\; MODE SWITCH (KERNEL -> USER MODE). ^TOTAL: 290 MICROSECONDS. .SKIP .INDENT -4 2. ^HANDLER START-UP: SET HANDLER NORMAL QUEUE EVENT FLAG; DECLARE SIGNIFICANT EVENT. ^TOTAL: 40 MICROSECONDS. .SKIP .INDENT -4 3. ^^ATL\\ SCAN: 20 MICROSECONDS PER ENTRY. ^ASSUME ^B^D.... IS FOURTH HIGHEST PRIORITY TASK. ^TOTAL: 80 MICROSECONDS. .SKIP .INDENT -4 4. ^CONTEXT SWITCH: SAVING CURRENT TASK'S REGISTERS, SETTING ENVIRONMENT FOR HANDLER TASK. ^TOTAL: 245 MICROSECONDS. .SKIP .INDENT -4 5. ^FINISH PROCESSING HANDLER WAIT, TASK AND CONTEXT SWITCH. ^TOTAL: 610 MICROSECONDS. .SKIP ^AT THIS POINT THE HANDLER TASK IS RUNNING AND KNOWS IT HAS SOMETHING TO DO. .SKIP .INDENT -4 6. ^I/^O REQUEST DEQUEUE: (2000 + (^N-1) * 115 * (1-^P)) MICROSECONDS WHERE ^N = TOTAL NUMBER OF ^P^U^D ENTRIES AND ^P = PROBABILITY OF A QUEUED, DEQUEUE-ABLE REQUEST FOR THE UNIT UNDER CONSIDERATION. ^FOR THE ^^MBD\\, ^N=16 AND ^P IS ABOUT 0.875 (FOR TRIGGER READOUT AT MODERATE EVENT RATES). ^TOTAL: 2216 MICROSECONDS. .SKIP ^AT THIS POINT THE HANDLER TASK KNOWS WHAT IT HAS TO DO. .SKIP .INDENT -4 .INDEX CONNECT TO INTERRUPT 7. ^^MBD\\ START-UP: INCREMENTING THE ^I/^O IN PROGRESS COUNT, CONNECT TO INTERRUPT, BUFFER VERIFICATION, VIRTUAL .INDEX BUFFER HEADER TO PHYSICAL ADDRESS CONVERSION, SAVING BUFFER HEADER WORDS, SETTING .INDEX CHANNEL INITIATION BUFFER HEADER WORDS, CHECK ^^MBD\\ READY, CHANNEL INITIATE. ^TOTAL: 800 MICROSECONDS. .SKIP .INDEX ^^MBD\\ EXECUTIVE ^AT THIS POINT THE ^^MBD\\ EXECUTIVE HAS BEEN STARTED. .SKIP .INDENT -4 .INDEX FILE REGISTERS 8. ^CHANNEL INITIALIZATION: SETTING BANK 1 REGISTERS, READING BUFFER HEADER DATA, DISPATCHING TO CHANNEL ENTRY POINT. ^TOTAL: 15 MICROSECONDS. .SKIP ^AT THIS POINT INTERPRETATION OF CHANNEL INSTRUCTIONS CAN BEGIN. ^FOR EACH INSTRUCTION EXECUTED, THE FOLLOWING TIME IS REQUIRED: .SKIP .INDENT -4 9. ^INSTRUCTION START: INSTRUCTION FETCH, STRIPPING FLAG BITS, VALIDITY CHECK, TABLE INDEXING, CONSTRUCTION OF ^^CTR\\, ^E^X1; PRIORITY DETERMINATION; JUMP VIA THE ^^CTR\\. ^ASSUME NO HIGHER PRIORITY CHANNELS ARE WAITING. ^TOTAL: 4.9 MICROSECONDS (NO GRADED-^^LAM\\ CYCLE) OR 5.25 MICROSECONDS (INTERVENING GRADED-^^LAM\\ CYCLE). .SKIP ^AT THIS POINT .INDEX FUNCTION ROUTINES AN ^^MBD\\ FUNCTION ROUTINE BEGINS EXECUTION. ^THE EXECUTION TIMES FOR THE FUNCTIONS VARY. ^A TYPICAL TIME FOR 16 BIT ^^CAMAC\\ READS IS 9.1 MICROSECONDS PER WORD READ (26 ^^MBD\\ INSTRUCTIONS) PLUS START-UP TIME. .SKIP .INDENT -4 .INDEX CHANNEL STOP 10.#^CHANNEL STOP: FETCH AND DISPATCH OF ^^CM.STP\\ INSTRUCTION, CALCULATION OF WORD COUNT, WRITING OUT WORD COUNT AND COMPLETION CODE, INTERRUPTING ^^PDP\\-11, ^E^X4. ^TOTAL TIME: 21 MICROSECONDS. .SKIP ^AT THIS POINT THE ^^PDP\\-11 INTERRUPT SEQUENCE OCCURS: .SKIP .INDENT -4 11.#^BUS REQUEST ACKNOWLEDGE/BUS GRANT/INTERRUPT TRANSACTION. ^ASSUME PROCESSOR PRIORITY < 5. ^TOTAL: 1.7 MICROSECONDS. .SKIP .INDENT -4 12.#^^PC, PSW\\ LOAD FROM INTERRUPT VECTOR. ^TOTAL: 3.0 MICROSECONDS. .SKIP .INDENT -4 13.#^NODE CODE: SAVING KERNEL ^^ASR\\3, SETTING KERNEL ^^ASR\\3, CLEARING BUS ACTIVITY BIT, SETTING CONDITION CODES IN ^^PSW\\, .INDEX INTERRUPT SERVICE ROUTINE JUMP TO INTERRUPT SERVICE ROUTINE. ^TOTAL: 9.8 MICROSECONDS. .SKIP .INDENT -4 14.#^INTERRUPT SERVICE ROUTINE: GETTING CONDITION CODES, CONSTRUCTING INTERRUPTING CHANNEL MASK, SETTING ^I/^O DONE EVENT FLAG, RESTORING KERNEL ^^ASR\\3, DECLARE SIGNIFICANT EVENT, INTERRUPT EXIT. ^TOTAL: 120 MICROSECONDS. .SKIP .INDENT -4 15.#^^ATL\\ SCAN: 20 MICROSECONDS PER ENTRY. ^ASSUME ^B^D.... IS THE FOURTH HIGHEST PRIORITY TASK. ^TOTAL: 80 MICROSECONDS. .SKIP .INDENT -4 16.#^CONTEXT SWITCH: SAVING CURRENT TASK'S REGISTERS, SETTING .INDEX ^^MBD\\ HANDLER ENVIRONMENT FOR HANDLER TASK. ^TOTAL: 245 MICROSECONDS. .SKIP .INDENT -4 17.#^FINISH PROCESSING HANDLER WAIT, TASK AND CONTEXT SWITCH. ^TOTAL: 610 MICROSECONDS. .SKIP ^AT THIS POINT THE HANDLER TASK IS RUNNING AGAIN AND AWARE THAT ^I/^O HAS COMPLETED. .SKIP .INDENT -4 18.#^CHANNEL CHECK: READ EVENT FLAGS, GET INTERRUPTING CHANNEL PATTERN, SEARCH ^^UIT\\ TABLE FOR ACTIVE CHANNELS, CHECK CHANNEL INTERRUPTED, READ BUFFER HEADER WORDS, RESTORE BUFFER HEADER WORDS, SIGNAL ^I/^O DONE. ^TOTAL: 700 MICROSECONDS. .SKIP .INDENT -4 .INDEX ^I/^O STATUS BLOCK 19.#^I/^O COMPLETION: SET ^I/^O STATUS BLOCK, QUEUE ^^AST\\ SERVICE ROUTINE, DECREMENT ^I/^O PENDING AND ^I/^O IN PROGRESS COUNTS, DECLARE SIGNIFICANT EVENT. ^TOTAL: 1438 MICROSECONDS. .SKIP .INDENT -4 20.#^^ATL\\ SCAN: 20 MICROSECONDS PER ENTRY. ^ASSUME CALLING TASK IS 10TH HIGHEST PRIORITY. ^TOTAL: 200 MICROSECONDS. .SKIP .INDENT -4 21.#^CONTEXT SWITCH: SAVING HANDLER TASK'S REGISTERS, SETTING ENVIRONMENT FOR CALLING TASK. ^TOTAL: 245 MICROSECONDS. .SKIP .INDENT -4 22.#^FINISH PROCESSING ^I/^O WAIT, TASK AND CONTEXT SWITCH. ^TOTAL: 610 MICROSECONDS. .SKIP ^AT THIS POINT THE ORIGINAL TASK IS RUNNING AGAIN, AND CAN PROCEED TO INSPECT THE ^I/^O STATUS BLOCK TO DETERMINE IF THE OPERATION SUCCEEDED. .LEFT MARGIN 0 .PARAGRAPH ^TOTAL TIME, ^&NOT\& INCLUDING TIME FOR EXECUTION OF CHANNEL PROGRAM (WHICH IS VARIABLE), IS: 8.54 MS. ^THIS CONSISTS OF 4.28 MS FROM ^^QIO\\ TO START OF CHANNEL PROGRAM EXECUTION, PLUS 4.26 MS FROM END OF CHANNEL PROGRAM TO FINISH. .LEFT MARGIN 0 .SUBTITLE ^^INDEX\\ .PAGE .CENTER ^^^&INDEX\&\\ .SKIP .PRINT INDEX