TTL'/1/...DEFINE NAME OF OUTPUT ARRAY 52WID 7CLM 8SRX...FORCE OCTAL RADIX IN = DEFINITIONS 2DUP LOC A10...MAKE A10 ENTRY LIST +LOC A10+LOC B10-LOC C10...MAKE A10 B10 C10 CELL LIST 2DUP LOC B10...MAKE B10 ENTRY LIST 990+LOC A10+LOC C10...ADD TO A10 C10 CELL LIST OCT 1762...OCTAL INTEGER IN TABLE ENTRY 1010...DECIMAL INTEGER IN TABLE ENTRY VALUE1=1762 VALUE2=DEC 1010 VALUE1...OCTAL INTEGER IN SYMBOL DEFINITION A10 B10 C10 VALUE2...DECIMAL INTEGER IN SYMBOL DEFINITION OCT 304202 IOR OCT 301022...INCLUSIVE OR 20202+80808...ADDITION 200000-98990...SUBTRACTION 100SIZ 2LFT 10 1LFT 10 0LFT 10...LEFT ARITHMETIC SHIFT 64SIZ 2LFT 24 1LFT 42 0LFT 18...LEFT LOGICAL SHIFT 2SIZ 1RIT+LOC A20+LOC A10...MAKE CELL LIST FOR A20 LOC A20...MAKE ENTRY LIST FOR A20 2DUP LOC A20...DUPLICATE AND ADD TO A20 ENTRY LIST A20 6RIT OCT 2417...RIGHT LOGICAL SHIFT 10SIZ 2RIT 202020...RIGHT ARITHMETIC SHIFT 81SIZ 1LFT 24 76...SET PACKING SIZE TO 81 MASK1=MSK ARG 1LFT ARG 2LFT ARG MASK2=MSK 100SIZ ARG 1LFT ARG 2LFT ARG 1LFT 24 76...MAKE SURE MASK DEFINITION LEFT SIZE UNCHANGED MASK2 20 20 1LFT 24 76...MAKE SURE USING MASK LEFT SIZE UNCHANGED MASK1 6 64 30...MAKE SURE DEFINITION USED CORRECT SIZE MASK2 10 10 10 MASK1 3 32 15...MULTIPLE MASKS TON MASK2 10 10 10 3 1LFT 32 2LFT 15...SIZE 81 BEYOND RANGE OF MASK MASK3=MSK 32SIZ ARG 1LFT ARG 2LFT ARG MASK4=MASK1 5 5 5 MASK1 45 7 23...TEST CORRECT MASK THEN SWITCH IT 6 64 30...MAKE SURE SWITCH CORRECTLY MSK... TURN OFF THE MASK VALUE1=2SIZ 34 32 VALUE2=17 17 VALUE1...TEST THAT DEFAULT SIGN CAN BE CHANGED IN DEF VALUE2 1RIT 2430...TEST PACKING SIZE STILL 81 . -4...TEST THAT . IS ADDRESS OF SELF LOC. -5...TEST THAT LOC . IS ALSO ACCEPTED VALUE1=MASK2 VALUE1 VALUE1 VALUE1...TEST THAT CONSTANT CAN BE REDEFINED TERMS OF SELF MASK5=MSK 5SIZ ARG 1LFT ARG 2LFT ARG MASK6=MSK 5SIZ 3LFT ARG 4LFT ARG 5LFT ARG MASK7=MASK5 MASK6 MASK7 0 1 1 4 4...TEST THAT MASKS CAN BE ADDED MASK8=MSK ARG 1LFT ARG MASK7 MASK8 300 15 0 3 0 2 2 MASK9=MASK7 ARG 1LFT ARG MASK9 0 3 0 2 2 0 300 15 MASK10=MSK MASK7 ARG 1LFT ARG MASK10 0 3 0 2 2 0 300 15 2DUP 303030 3DUP MASK1 9 15+LOC A46...TEST DUP WITH UNKNOWN ADDRESS A46 1RIT 3240...TEST PACKING SIZE STILL 81 20 20...TEST DEFAULT ADDITION VALUE1=24 24 VALUE1 64SIZ 40 8 32...TEST DEFAULT INCLUSIVE OR VALUE1=40 10 50 VALUE1 A51 12BIT A53 10BIT A53 MASK1 12BIT A52,,, 49 10BIT A52 31 8BIT A51 8BIT A52 A52 11BIT A51 A53 11BIT A52 MASK1 9BIT,,, A51 9BIT A52 22 7BIT A51 18 4BIT A51 12BIT A54 11BIT B54 A54 10BIT.9BIT,,, A54 8BIT B54 B54 64 7BIT A52 8 4BIT A52 81SIZ 10SRX VALUE1=1LFT 12 38 216SIZ 1LFT 4 146 MASK2 10 10 MSK,,, 25SIZ 2LFT 1 1LFT 15 10 VALUE2=2LFT 15 1LFT 32 3 216SIZ 2LFT 2 1LFT 35 138,,, MASK2 10 10 10 25SIZ 3LFT 6 2LFT 11 1LFT 15 10 VALUE3=2LFT 15 1LFT 32 3 2LFT 216SIZ 2 1LFT 35 138,,, MASK2 10 10 10 3LFT 25SIZ 6 2LFT 11 1LFT 15 10 VALUE4=2LFT 15 1LFT 216SIZ 35 MASK2 10 MSK,,, 3LFT 25SIZ 6 MASK2 0 10 MSK 1LFT 15 2LFT 216SIZ,,, 2 1LFT 81SIZ 32 3 138 25SIZ MASK2 0 0 10,,, 2LFT 11 10 VALUE1,VALUE2,VALUE3,VALUE4 2LFT 15 1LFT 32 3 2LFT 216SIZ 2 1LFT 35 138,,, MASK2 10 10 10 3LFT 25SIZ 6 2LFT 11 1LFT 15 10 81SIZ 2LFT 15 1LFT 216SIZ 35 MASK2 10 MSK,,, 3LFT 25SIZ 6 MASK2 0 10 MSK 1LFT 15 2LFT 216SIZ,,, 2 1LFT 81SIZ 32 3 138 25SIZ MASK2 0 0 10,,, 2LFT 11 10 81SIZ 2TRX 16SRX,110010,ITEM1=3C 3TRX 15SRX,1212,ITEM2=40 4TRX 14SRX,302,ITEM3=44 5TRX 13SRX,200,ITEM4=48 6TRX 12SRX,122,ITEM5=50 7TRX 11SRX,20503,ITEM6=460A 8TRX 10SRX,11672,ITEM7=6060 9TRX 9SRX,6831,ITEM8=8273 10TRX 8SRX,5050,ITEM9=13654 11TRX 7SRX,3881,ITEM10=23445 12TRX 6SRX,204336,ITEM11=20553500 13TRX 5SRX,148B60,ITEM12=123343220 14TRX 4SRX,D20B0,ITEM13=2103331230 15TRX 3SRX,9E9A0,ITEM14=1010210100200 16TRX 2SRX,7B4DA,ITEM15=10010011111101101100 ITEM1,ITEM2,ITEM3,ITEM4,ITEM5 ITEM6,ITEM7,ITEM8,ITEM9,ITEM10 ITEM11,ITEM12,ITEM13,ITEM14,ITEM15 10TRX 10SRX ZERO=0,ONE=1 IFE ZERO 70 70 IFN ZERO 1 2 IFE ZERO 3 4 IFN ZERO 5 6 END 7 8 END 9 10 END 70 70 IFN ONE 70 7070 IFE ONE 11 12 IFN ONE 13 14 END 15 16 END 7070 7070 END 7070 7070 END 707070 707070 2DUP 20BIT.18BIT.16BIT.15BIT,,,TEST DUP WITH DEPOSIT IN THIS .12BIT.9BIT.8BIT.7BIT.6BIT.5BIT.4BIT.3BIT.2BIT. A105 1DUP 20BIT A105 18BIT,,,TEST DIF BETWEEN B ADR AND B. A105 16BIT A105 15BIT A105 12BIT A105 9BIT A105 ,,, 8BIT A105 7BIT.6BIT A105 5BIT.4BIT A105 3BIT A105 2BIT A105 10, 10, 10, 10, 10 1010, 1010, 1010, 1010, 1010 101010,101010,101010,101010,101010 20, 20, 20, 20, 20 2020, 2020, 2020, 2020, 2020 202020,202020,202020,202020,202020 30, 30, 30, 30, 30 3030, 3030, 3030, 3030, 3030 303030,303030,303030,303030,303030 40, 40, 40, 40, 40 4040, 4040, 4040, 4040, 4040 404040,404040,404040,404040,404040 50, 50, 50, 50, 50 5050, 5050, 5050, 5050, 5050 505050,505050,505050,505050,505050 60, 60, 60, 60, 60 6060, 6060, 6060, 6060, 6060 606060,606060,606060,606060,606060 70, 70, 70, 70, 70 7070, 7070, 7070, 7070, 7070 707070,707070,707070,707070,707070 105TST...DEFINE NUMBER OF ENTRIES IN THIS TEST TABLE BLK I0=0 I1=1 I2=2 I3=3 I4=4 I5=5 I6=6 I7=7 I8=8 I9=9 I10=10 I11=11 I12=12 I13=13 I14=14 I15=15 I16=16 I18=18 I20=20 I22=22 I23=23 I24=24 I25=25 I30=30 I31=31 I32=32 I35=35 I38=38 I40=40 I42=42 I45=45 I49=49 I52=52 I64=64 I70=70 I76=76 I81=81 I100=100 I119=119 I105=105 I138=138 I146=146 I216=216 I300=300 I990=990 I1010=1010 I2430=2430 I3240=3240 I5050=5050 I6060=6060 I7070=7070 I20202=20202 I80808=80808 I98990=98990 I200000=200000 I202020=202020 I303030=303030 I707070=707070 TST I105...DEFINE NUMBER OF ENTRIES IN THIS TEST TABLE TTL'/2/...DEFINE NAME OF OUTPUT ARRAY WID I52 CLM I7 SRX I8...FORCE OCTAL RADIX IN = DEFINITIONS DUP I2 LOC A10...MAKE A10 ENTRY LIST +LOC A10+LOC B10-LOC C10...MAKE A10 B10 C10 CELL LIST DUP I2 LOC B10...MAKE B10 ENTRY LIST I990+LOC A10+LOC C10...ADD TO A10 C10 CELL LIST OCT 1762...OCTAL INTEGER IN TABLE ENTRY I1010...DECIMAL INTEGER IN TABLE ENTRY VALUE1=1762 VALUE2=I1010 VALUE1...OCTAL INTEGER IN SYMBOL DEFINITION A10 B10 C10 VALUE2...DECIMAL INTEGER IN SYMBOL DEFINITION OCT 304202 IOR OCT 301022...INCLUSIVE OR I20202+I80808...ADDITION I200000-I98990...SUBTRACTION SIZ I100 LFT I2 I10 LFT I1 I10 LFT I0 I10...LEFT ARITHMETIC SHIFT SIZ I64 LFT I2 I24 LFT I1 I42 LFT I0 I18...LEFT LOGICAL SHIFT SIZ I2 RIT I1+LOC A20+LOC A10...MAKE CELL LIST FOR A20 LOC A20...MAKE ENTRY LIST FOR A20 DUP I2 LOC A20...DUPLICATE AND ADD TO A20 ENTRY LIST A20 RIT I6 OCT 2417...RIGHT LOGICAL SHIFT SIZ I10 RIT I2 I202020...RIGHT ARITHMETIC SHIFT SIZ I81 LFT I1 I24 I76...SET PACKING SIZE TO 81 MASK1=MSK LFT I0 ARG LFT I1 ARG LFT I2 ARG MASK2=MSK SIZ I100 LFT I0 ARG LFT I1 ARG LFT I2 ARG LFT I1 I24 I76...MAKE SURE MASK DEFINITION LEFT SIZE UNCHANGED MASK2 I20 I20 LFT I1 I24 I76...MAKE SURE USING MASK LEFT SIZE UNCHANGED MASK1 I6 I64 I30...MAKE SURE DEFINITION USED CORRECT SIZE MASK2 I10 I10 I10 MASK1 I3 I32 I15...MULTIPLE MASKS TON MASK2 I10 I10 I10 I3 LFT I1 I32 LFT I2 I15...SIZE 81 BEYOND RANGE OF MASK MASK3=MSK SIZ I32 LFT I0 ARG LFT I1 ARG LFT I2 ARG MASK4=MASK1 I5 I5 I5 MASK1 I45 I7 I23...TEST CORRECT MASK THEN SWITCH IT I6 I64 I30...MAKE SURE SWITCH CORRECTLY MSK... TURN OFF THE MASK VALUE1=SIZ I2 34 32 VALUE2=17 17 VALUE1...TEST THAT DEFAULT SIGN CAN BE CHANGED IN DEF VALUE2 RIT I1 I2430...TEST PACKING SIZE STILL 81 . -I4...TEST THAT . IS ADDRESS OF SELF LOC. -I5...TEST THAT LOC . IS ALSO ACCEPTED VALUE1=MASK2 VALUE1 VALUE1 VALUE1...TEST THAT CONSTANT CAN BE REDEFINED TERMS OF SELF MASK5=MSK SIZ I5 LFT I0 ARG LFT I1 ARG LFT I2 ARG MASK6=MSK SIZ I5 LFT I3 ARG LFT I4 ARG LFT I5 ARG MASK7=MASK5 MASK6 MASK7 I0 I1 I1 I4 I4...TEST THAT MASKS CAN BE ADDED MASK8=MSK LFT I0 ARG LFT I1 ARG MASK7 MASK8 I300 I15 I0 I3 I0 I2 I2 MASK9=MASK7 LFT I0 ARG LFT I1 ARG MASK9 I0 I3 I0 I2 I2 I0 I300 I15 MASK10=MSK MASK7 LFT I0 ARG LFT I1 ARG MASK10 I0 I3 I0 I2 I2 I0 I300 I15 DUP I2 I303030 DUP I3 MASK1 I9 I15+LOC A46...TEST DUP WITH UNKNOWN ADDRESS A46 RIT I1 I3240...TEST PACKING SIZE STILL 81 I20 I20...TEST DEFAULT ADDITION VALUE1=24 24 VALUE1 SIZ I64 I40 I8 I32...TEST DEFAULT INCLUSIVE OR VALUE1=40 10 50 VALUE1 A51 BIT I12 A53 BIT I10 A53 MASK1 BIT I12 A52,,, I49 BIT I10 A52 I31 BIT I8 A51 BIT I8 A52 A52 BIT I11 A51 A53 BIT I11 A52 MASK1 BIT I9,,, A51 BIT I9 A52 I22 BIT I7 A51 I18 BIT I4 A51 BIT I12 A54 BIT I11 B54 A54 BIT I10.BIT I9,,, A54 BIT I8 B54 B54 I64 BIT I7 A52 I8 BIT I4 A52 SIZ I81 SRX I10 VALUE1=LFT I1 I12 I38 SIZ I216 LFT I1 I4 I146 MASK2 I10 I10 MSK,,, SIZ I25 LFT I2 I1 LFT I1 I15 I10 VALUE2=LFT I2 I15 LFT I1 I32 I3 SIZ I216 LFT I2 I2 LFT I1 I35 I138,,, MASK2 I10 I10 I10 SIZ I25 LFT I3 I6 LFT I2 I11 LFT I1 I15 I10 VALUE3=LFT I2 I15 LFT I1 I32 I3 LFT I2 SIZ I216 I2 LFT I1 I35 I138,,, MASK2 I10 I10 I10 LFT I3 SIZ I25 I6 LFT I2 I11 LFT I1 I15 I10 VALUE4=LFT I2 I15 LFT I1 SIZ I216 I35 MASK2 I10 MSK,,, LFT I3 SIZ I25 I6 MASK2 I0 I10 MSK LFT I1 I15 LFT I2 SIZ I216,,, I2 LFT I1 SIZ I81 I32 I3 I138 SIZ I25 MASK2 I0 I0 I10,,, LFT I2 I11 I10 VALUE1,VALUE2,VALUE3,VALUE4 LFT I2 I15 LFT I1 I32 I3 LFT I2 SIZ I216 I2 LFT I1 I35 I138,,, MASK2 I10 I10 I10 LFT I3 SIZ I25 I6 LFT I2 I11 LFT I1 I15 I10 SIZ I81 LFT I2 I15 LFT I1 SIZ I216 I35 MASK2 I10 MSK,,, LFT I3 SIZ I25 I6 MASK2 I0 I10 MSK LFT I1 I15 LFT I2 SIZ I216,,, I2 LFT I1 SIZ I81 I32 I3 I138 SIZ I25 MASK2 I0 I0 I10,,, LFT I2 I11 I10 SIZ I81 TRX I2 SRX I16,110010,ITEM1=3C TRX I3 SRX I15,1212,ITEM2=40 TRX I4 SRX I14,302,ITEM3=44 TRX I5 SRX I13,200,ITEM4=48 TRX I6 SRX I12,122,ITEM5=50 TRX I7 SRX I11,20503,ITEM6=460A TRX I8 SRX I10,11672,ITEM7=I6060 TRX I9 SRX I9,6831,ITEM8=8273 TRX I10 SRX I8,I5050,ITEM9=13654 TRX I11 SRX I7,3881,ITEM10=23445 TRX I12 SRX I6,204336,ITEM11=20553500 TRX I13 SRX I5,148B60,ITEM12=123343220 TRX I14 SRX I4,D20B0,ITEM13=2103331230 TRX I15 SRX I3,9E9A0,ITEM14=1010210100200 TRX I16 SRX I2,7B4DA,ITEM15=10010011111101101100 ITEM1,ITEM2,ITEM3,ITEM4,ITEM5 ITEM6,ITEM7,ITEM8,ITEM9,ITEM10 ITEM11,ITEM12,ITEM13,ITEM14,ITEM15 TRX I10 SRX I10 IFE I0 I70 I70 IFN I0 I1 I2 IFE I0 I3 I4 IFN I0 I5 I6 END I7 I8 END I9 I10 END I70 I70 IFN I1 I70 I7070 IFE I1 I11 I12 IFN I1 I13 I14 END I15 I16 END I7070 I7070 END I7070 I7070 END I707070 I707070 DUP I2 BIT I20.BIT I18.BIT I16.BIT I15,,,TEST DUP WITH DEPOSIT IN THIS .BIT I12.BIT I9.BIT I8.BIT I7.BIT I6.BIT I5.BIT I4.BIT I3.BIT I2. A105 DUP I1 BIT I20 A105 BIT I18,,,TEST DIF BETWEEN B ADR AND B. A105 BIT I16 A105 BIT I15 A105 BIT I12 A105 BIT I9 A105 ,,, BIT I8 A105 BIT I7.BIT I6 A105 BIT I5.BIT I4 A105 BIT I3 A105 BIT I2 A105 XSY MASK1 MASK2 MASK3 MASK4 MASK5 MASK6 MASK7,,, MASK8 MASK9 MASK10 B2=BIT I2 B3=BIT I3 B4=BIT I4 B5=BIT I5 B6=BIT I6 B7=BIT I7 B8=BIT I8 B9=BIT I9 B12=BIT I12 B15=BIT I15 B16=BIT I16 B18=BIT I18 B20=BIT I20 BIT4=BIT I4 BIT7=BIT I7 BIT8=BIT I8 BIT9=BIT I9 BIT10=BIT I10 BIT11=BIT I11 BIT12=BIT I12 CLM7=CLM I7 DUP1=DUP I1 DUP2=DUP I2 DUP3=DUP I3 DUP4=DUP I4 L0=LFT I0 L1=LFT I1 L2=LFT I2 L3=LFT I3 L4=LFT I4 L5=LFT I5 LFT1=LFT I1 LFT2=LFT I2 LFT6=LFT I6 LFT8=LFT I8 R1=RIT I1 R2=RIT I2 RIT6=RIT I6 SIZ2=SIZ I2 SIZ3=SIZ I3 SIZ5=SIZ I5 SIZ6=SIZ I6 SIZ10=SIZ I10 SIZ13=SIZ I13 SIZ25=SIZ I25 SIZ32=SIZ I32 SIZ64=SIZ I64 SIZ81=SIZ I81 SIZ100=SIZ I100 SIZ216=SIZ I216 SRX2=SRX I2 SRX3=SRX I3 SRX4=SRX I4 SRX5=SRX I5 SRX6=SRX I6 SRX7=SRX I7 SRX8=SRX I8 SRX9=SRX I9 SRX10=SRX I10 SRX11=SRX I11 SRX12=SRX I12 SRX13=SRX I13 SRX14=SRX I14 SRX15=SRX I15 SRX16=SRX I16 TRX2=TRX I2 TRX3=TRX I3 TRX4=TRX I4 TRX5=TRX I5 TRX6=TRX I6 TRX7=TRX I7 TRX8=TRX I8 TRX9=TRX I9 TRX10=TRX I10 TRX11=TRX I11 TRX12=TRX I12 TRX13=TRX I13 TRX14=TRX I14 TRX15=TRX I15 TRX16=TRX I16 TST105=TST I105 WID52=WID I52 10, 10, 10, 10, 10 1010, 1010, 1010, 1010, 1010 101010,101010,101010,101010,101010 20, 20, 20, 20, 20 2020, 2020, 2020, 2020, 2020 202020,202020,202020,202020,202020 30, 30, 30, 30, 30 3030, 3030, 3030, 3030, 3030 303030,303030,303030,303030,303030 40, 40, 40, 40, 40 4040, 4040, 4040, 4040, 4040 404040,404040,404040,404040,404040 50, 50, 50, 50, 50 5050, 5050, 5050, 5050, 5050 505050,505050,505050,505050,505050 60, 60, 60, 60, 60 6060, 6060, 6060, 6060, 6060 606060,606060,606060,606060,606060 70, 70, 70, 70, 70 7070, 7070, 7070, 7070, 7070 707070,707070,707070,707070,707070 SAV TST105...DEFINE NUMBER OF ENTRIES IN THIS TEST TABLE TTL'/3/...DEFINE NAME OF OUTPUT ARRAY WID52 CLM7 SRX8...FORCE OCTAL RADIX IN = DEFINITIONS DUP2 LOC A10...MAKE A10 ENTRY LIST +LOC A10+LOC B10-LOC C10...MAKE A10 B10 C10 CELL LIST DUP2 LOC B10...MAKE B10 ENTRY LIST I990+LOC A10+LOC C10...ADD TO A10 C10 CELL LIST OCT 1762...OCTAL INTEGER IN TABLE ENTRY I1010...DECIMAL INTEGER IN TABLE ENTRY VALUE1=1762 VALUE2=I1010 VALUE1...OCTAL INTEGER IN SYMBOL DEFINITION A10 B10 C10 VALUE2...DECIMAL INTEGER IN SYMBOL DEFINITION OCT 304202 IOR OCT 301022...INCLUSIVE OR I20202+I80808...ADDITION I200000-I98990...SUBTRACTION SIZ100 L2 I10 L1 I10 L0 I10...LEFT ARITHMETIC SHIFT SIZ64 L2 I24 L1 I42 L0 I18...LEFT LOGICAL SHIFT SIZ2 R1+LOC A20+LOC A10...MAKE CELL LIST FOR A20 LOC A20...MAKE ENTRY LIST FOR A20 DUP2 LOC A20...DUPLICATE AND ADD TO A20 ENTRY LIST A20 RIT6 OCT 2417...RIGHT LOGICAL SHIFT SIZ10 R2 I202020...RIGHT ARITHMETIC SHIFT SIZ81 L1 I24 I76...SET PACKING SIZE TO 81 MASK1=MSK L0 ARG L1 ARG L2 ARG MASK2=MSK SIZ100 L0 ARG L1 ARG L2 ARG L1 I24 I76...MAKE SURE MASK DEFINITION LEFT SIZE UNCHANGED MASK2 I20 I20 L1 I24 I76...MAKE SURE USING MASK LEFT SIZE UNCHANGED MASK1 I6 I64 I30...MAKE SURE DEFINITION USED CORRECT SIZE MASK2 I10 I10 I10 MASK1 I3 I32 I15...MULTIPLE MASKS TON MASK2 I10 I10 I10 I3 L1 I32 L2 I15...SIZE 81 BEYOND RANGE OF MASK MASK3=MSK SIZ32 L0 ARG L1 ARG L2 ARG MASK4=MASK1 I5 I5 I5 MASK1 I45 I7 I23...TEST CORRECT MASK THEN SWITCH IT I6 I64 I30...MAKE SURE SWITCH CORRECTLY MSK... TURN OFF THE MASK VALUE1=SIZ2 34 32 VALUE2=17 17 VALUE1...TEST THAT DEFAULT SIGN CAN BE CHANGED IN DEF VALUE2 R1 I2430...TEST PACKING SIZE STILL 81 . -I4...TEST THAT . IS ADDRESS OF SELF LOC. -I5...TEST THAT LOC . IS ALSO ACCEPTED VALUE1=MASK2 VALUE1 VALUE1 VALUE1...TEST THAT CONSTANT CAN BE REDEFINED TERMS OF SELF MASK5=MSK SIZ5 L0 ARG L1 ARG L2 ARG MASK6=MSK SIZ5 L3 ARG L4 ARG L5 ARG MASK7=MASK5 MASK6 MASK7 I0 I1 I1 I4 I4...TEST THAT MASKS CAN BE ADDED MASK8=MSK L0 ARG L1 ARG MASK7 MASK8 I300 I15 I0 I3 I0 I2 I2 MASK9=MASK7 L0 ARG L1 ARG MASK9 I0 I3 I0 I2 I2 I0 I300 I15 MASK10=MSK MASK7 L0 ARG L1 ARG MASK10 I0 I3 I0 I2 I2 I0 I300 I15 DUP2 I303030 DUP3 MASK1 I9 I15+LOC A46...TEST DUP WITH UNKNOWN ADDRESS A46 R1 I3240...TEST PACKING SIZE STILL 81 I20 I20...TEST DEFAULT ADDITION VALUE1=24 24 VALUE1 SIZ64 I40 I8 I32...TEST DEFAULT INCLUSIVE OR VALUE1=40 10 50 VALUE1 A51 BIT12 A53 BIT10 A53 MASK1 BIT12 A52,,, I49 BIT10 A52 I31 BIT8 A51 BIT8 A52 A52 BIT11 A51 A53 BIT11 A52 MASK1 BIT9,,, A51 BIT9 A52 I22 BIT7 A51 I18 BIT4 A51 BIT12 A54 BIT11 B54 A54 BIT10.BIT9,,, A54 BIT8 B54 B54 I64 BIT7 A52 I8 BIT4 A52 SIZ81 SRX10 VALUE1=L1 I12 I38 SIZ216 L1 I4 I146 MASK2 I10 I10 MSK,,, SIZ25 L2 I1 L1 I15 I10 VALUE2=L2 I15 L1 I32 I3 SIZ216 L2 I2 L1 I35 I138,,, MASK2 I10 I10 I10 SIZ25 L3 I6 L2 I11 L1 I15 I10 VALUE3=L2 I15 L1 I32 I3 L2 SIZ216 I2 L1 I35 I138,,, MASK2 I10 I10 I10 L3 SIZ25 I6 L2 I11 L1 I15 I10 VALUE4=L2 I15 L1 SIZ216 I35 MASK2 I10 MSK,,, L3 SIZ25 I6 MASK2 I0 I10 MSK L1 I15 L2 SIZ216,,, I2 L1 SIZ81 I32 I3 I138 SIZ25 MASK2 I0 I0 I10,,, L2 I11 I10 VALUE1,VALUE2,VALUE3,VALUE4 L2 I15 L1 I32 I3 L2 SIZ216 I2 L1 I35 I138,,, MASK2 I10 I10 I10 L3 SIZ25 I6 L2 I11 L1 I15 I10 SIZ81 L2 I15 L1 SIZ216 I35 MASK2 I10 MSK,,, L3 SIZ25 I6 MASK2 I0 I10 MSK L1 I15 L2 SIZ216,,, I2 L1 SIZ81 I32 I3 I138 SIZ25 MASK2 I0 I0 I10,,, L2 I11 I10 SIZ81 TRX2 SRX16,110010,ITEM1=3C TRX3 SRX15,1212,ITEM2=40 TRX4 SRX14,302,ITEM3=44 TRX5 SRX13,200,ITEM4=48 TRX6 SRX12,122,ITEM5=50 TRX7 SRX11,20503,ITEM6=460A TRX8 SRX10,11672,ITEM7=I6060 TRX9 SRX9,6831,ITEM8=8273 TRX10 SRX8,I5050,ITEM9=13654 TRX11 SRX7,3881,ITEM10=23445 TRX12 SRX6,204336,ITEM11=20553500 TRX13 SRX5,148B60,ITEM12=123343220 TRX14 SRX4,D20B0,ITEM13=2103331230 TRX15 SRX3,9E9A0,ITEM14=1010210100200 TRX16 SRX2,7B4DA,ITEM15=10010011111101101100 ITEM1,ITEM2,ITEM3,ITEM4,ITEM5 ITEM6,ITEM7,ITEM8,ITEM9,ITEM10 ITEM11,ITEM12,ITEM13,ITEM14,ITEM15 TRX10 SRX10 IFE I0 I70 I70 IFN I0 I1 I2 IFE I0 I3 I4 IFN I0 I5 I6 END I7 I8 END I9 I10 END I70 I70 IFN I1 I70 I7070 IFE I1 I11 I12 IFN I1 I13 I14 END I15 I16 END I7070 I7070 END I7070 I7070 END I707070 I707070 DUP2 B20.B18.B16.B15,,,TEST DUP WITH DEPOSIT IN THIS .B12.B9.B8.B7.B6.B5.B4.B3.B2. A105 DUP1 B20 A105 B18,,,TEST DIF BETWEEN B ADR AND B. A105 B16 A105 B15 A105 B12 A105 B9 A105 ,,, B8 A105 B7.B6 A105 B5.B4 A105 B3 A105 B2 A105 10, 10, 10, 10, 10 1010, 1010, 1010, 1010, 1010 101010,101010,101010,101010,101010 20, 20, 20, 20, 20 2020, 2020, 2020, 2020, 2020 202020,202020,202020,202020,202020 30, 30, 30, 30, 30 3030, 3030, 3030, 3030, 3030 303030,303030,303030,303030,303030 40, 40, 40, 40, 40 4040, 4040, 4040, 4040, 4040 404040,404040,404040,404040,404040 50, 50, 50, 50, 50 5050, 5050, 5050, 5050, 5050 505050,505050,505050,505050,505050 60, 60, 60, 60, 60 6060, 6060, 6060, 6060, 6060 606060,606060,606060,606060,606060 70, 70, 70, 70, 70 7070, 7070, 7070, 7070, 7070 707070,707070,707070,707070,707070 BLK 75TST TTL'/4/ 4BIT AA 7BIT AA 9BIT AA AA 5DUP 3DUP BB 5WRD 10BIT.5WRD 7BIT.5WRD 5BIT.5WRD 4BIT.,,, 4WRD 10BIT.4WRD 8BIT.4WRD 6BIT.4WRD 5BIT.,,, 4WRD 4BIT.4WRD 3BIT.8BIT BB 6BIT BB,,, 3WRD 10BIT.3WRD 9BIT.3WRD 6BIT.,,, 2WRD 10BIT.2WRD 9BIT.2WRD 8BIT.2WRD 3BIT. 9BIT CC 5BIT CC 6BIT AA 8BIT AA 10BIT AA 10BIT BB 9BIT BB 7BIT BB 4BIT BB MASK=MSK ARG.ARG.ARG.ARG.,,, ARG.ARG.ARG. 5DUP CC MASK 2WRD 400 4WRD 100 300 4WRD DD 200,,, 7WRD 111 5WRD 222 3WRD 333 444 8BIT CC,7BIT CC,6BIT CC,3BIT CC 1000,1000,1000,1000,1000 1000, 900, 800, 700, 600 1000, 900, 800, 700, 600 1000, 900, 800, 700, 600 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 10BIT DD 6BIT DD 4BIT DD 2BIT DD 1BIT DD BLK I1=1,I2=2,I3=3,I4=4,I5=5,I6=6,I7=7,I8=8,I9=9,I10=10 I75=75,TST I75 TTL'/5/, I0=0 BIT I4 AA BIT I7 AA BIT I9 AA AA 5DUP 3DUP BB WRD I5 BIT I10.WRD I5 BIT I7.WRD I5 BIT I5.,,, WRD I5 BIT I4. WRD I4 BIT I10.WRD I4 BIT I8.,,, WRD I4 BIT I6.WRD I4 BIT I5. WRD I4 BIT I4.,,, WRD I4 BIT I3.BIT I8 BB BIT I6 BB WRD I3 BIT,,, I10.WRD I3 BIT I9.WRD I3 BIT I6. WRD I2 BIT,,, I10.WRD I2 BIT I9.WRD I2 BIT I8.WRD I2 BIT I3. BIT I9 CC BIT I5 CC BIT I6 AA BIT I8 AA BIT I10 AA BIT I10 BB BIT I9 BB BIT I7 BB BIT I4 BB MASK=MSK LFT I0 ARG.LFT I0 ARG.LFT I0 ARG.LFT I0 ARG.LFT,,, I0 ARG.LFT I0 ARG.LFT I0 ARG. DUP I5 CC MASK WRD I2 400 WRD I4 100 300 WRD I4 DD 200,,, WRD I7 111 WRD I5 222 WRD I3 333 444 BIT I8 CC,BIT I7 CC,BIT I6 CC,BIT I3 CC 1000,1000,1000,1000,1000 1000, 900, 800, 700, 600 1000, 900, 800, 700, 600 1000, 900, 800, 700, 600 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 BIT I10 DD BIT I6 DD BIT I4 DD BIT I2 DD BIT I1 DD WRD1=WRD I1,WRD2=WRD I2,WRD3=WRD I3,WRD4=WRD I4 WRD5=WRD I5,BIT1=BIT I1,BIT2=BIT I2,BIT3=BIT I3 BIT4=BIT I4,BIT5=BIT I5,BIT6=BIT I6,BIT7=BIT I7 BIT8=BIT I8,BIT9=BIT I9,BIT10=BIT I10,TST75=TST I75 DUP5=DUP I5,WRD7=WRD I7 SAV TST75 TTL'/6/ BIT4 AA BIT7 AA BIT9 AA AA 5DUP 3DUP BB WRD5 BIT10.WRD5 BIT7.WRD5 BIT5.WRD5 BIT4.,,, WRD4 BIT10.WRD4 BIT8.WRD4 BIT6.WRD4 BIT5.,,, WRD4 BIT4.WRD4 BIT3.BIT8 BB BIT6 BB,,, WRD3 BIT10.WRD3 BIT9.WRD3 BIT6.,,, WRD2 BIT10.WRD2 BIT9.WRD2 BIT8.WRD2 BIT3. BIT9 CC BIT5 CC BIT6 AA BIT8 AA BIT10 AA BIT10 BB BIT9 BB BIT7 BB BIT4 BB DUP5 CC MASK WRD2 400 WRD4 100 300 WRD4 DD 200,,, WRD7 111 WRD5 222 WRD3 333 444 BIT8 CC,BIT7 CC,BIT6 CC,BIT3 CC 1000,1000,1000,1000,1000 1000, 900, 800, 700, 600 1000, 900, 800, 700, 600 1000, 900, 800, 700, 600 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 500, 400, 300, 200, 100, 0, 555, 444, 333, 222, 111 BIT10 DD BIT6 DD BIT4 DD BIT2 DD BIT1 DD BLK ...TABLE TO TEST MULTIPLE PRECISION TTL'/7/,ONE=1 TWO=2WRD ONE+2WRD ONE THREE=3WRD 3 FOUR=4WRD ONE+2WRD THREE FIVE=4WRD TWO+3WRD THREE SIX=ONE TWO THREE FOUR FIVE SEVEN=3WRD 3 2WRD 2 5WRD 5 ONE FOUR MASK=MSK 1WRD ARG 2WRD ARG 3WRD ARG 4WRD,,, ARG 5WRD ARG EIGHT=MASK ONE NINE=MASK TWO TEN=MASK NUL NUL 3 ELEVEN=MASK () () () 4 TWELVE=MASK(NUL)(NUL)(NUL)(NUL)5 ONE TWO THREE FOUR FIVE SIX SEVEN EIGHT NINE TEN ELEVEN TWELVE MASK ONE MASK TWO MASK NUL NUL 3 MASK()()()4,,, MASK(NUL)(NUL)(NUL)(NUL)5 25TST 1,2,3,4,5,1,2,3,4,5,1,2,3,4,5,1,2,3,4,5,1,2,3,4,5 BLK ...TABLE TO TEST ABILITY TO REDEFINE BYTE PATTERN ...IN TERMS OF ITSELF TTL'/8/ MASK=MSK MASK=MASK ARG MASK 1 MASK=MASK 2WRD ARG MASK 2 3 MASK=MASK 3WRD ARG MASK 4 5 6 MASK=MASK 4WRD ARG MASK 7 8 9 10 10TST 1,2,3,4,5,6,7,8,9,10 BLK ...TABLE TO TEST ABILITY TO REDEFINE CONSTANT ...IN TERMS OF ITSELF TTL'/9/ ONE=1 ONE=ONE 2WRD 2 ONE=ONE 3WRD 3 ONE=ONE 4WRD 4 ONE=ONE 5WRD 5 6WRD 6 9WRD 9 ONE=ONE 10WRD 10 7WRD 7 8WRD 8 10TST ONE,1,2,3,4,5,6,7,8,9,10 BLK ...TABLE TO TEST ADDRESS RECOGNITION MASK=MSK ARG 5LFT ARG AA 2WRD 3DUP BB 5WRD EE MASK 4WRD DD 3WRD CC LOC AA 2WRD LOC BB 3WRD LOC CC 4WRD LOC DD,,, 5WRD LOC EE 1BIT AA FF 10SRX GG 10TRX HH 55WID II 1CLM JJ TON MASK,,, KK 2BIT BB 1BIT CC 2BIT CC 3BIT DD 3BIT EE 1BIT EE,,, LL TTL'/10/ MM 34TST NN 3BIT RR 3BIT QQ 5WRD RR,,, 4WRD QQ 3WRD PP 1BIT RR 1BIT PP 1BIT NN 2BIT PP,,, 2BIT OO 2WRD OO 6WRD LOC FF,LOC GG,LOC HH,LOC II LOC JJ,LOC KK,LOC LL,LOC MM,LOC NN 1,2,3,4,5,1,2,3,4,5,1,2,3,4,5,1,2,3,4,5 1,2,3,4,5,21,21,21,21,21,21,21,21,21 BLK I1=1,I2=2,I3=3,I4=4,I5=5,I6=6,I10=10,I34=34,I55=55 ...TABLE TO TEST ADDRESS RECOGNITION MASK=MSK ARG 5LFT ARG AA WRD I2 DUP I3 BB WRD I5 EE MASK WRD I4 DD WRD I3 CC LOC AA WRD I2 LOC BB WRD I3 LOC CC WRD I4 LOC DD,,, WRD I5 LOC EE BIT I1 AA FF SRX I10 GG TRX I10 HH WID I55 II CLM I1 JJ TON MASK,,, KK BIT I2 BB BIT I1 CC BIT I2 CC BIT I3 DD BIT I3 EE BIT I1 EE,,, LL TTL'/11/ MM TST I34 NN BIT I3 RR BIT I3 QQ WRD I5 RR,,, WRD I4 QQ WRD I3 PP BIT I1 RR BIT I1 PP BIT I1 NN BIT I2 PP,,, BIT I2 OO WRD I2 OO WRD I6 LOC FF,LOC GG,LOC HH,LOC II LOC JJ,LOC KK,LOC LL,LOC MM,LOC NN 1,2,3,4,5,1,2,3,4,5,1,2,3,4,5,1,2,3,4,5 1,2,3,4,5,21,21,21,21,21,21,21,21,21 WRD1=WRD I1,WRD2=WRD I2,WRD3=WRD I3,WRD4=WRD I4,WRD5=WRD I5 WRD6=WRD I6,DUP3=DUP I3,SRX10=SRX I10,TRX10=TRX I10,WID55=WID I55 CLM1=CLM I1,TST34=TST I34,BIT1=BIT I1,BIT2=BIT I2,BIT3=BIT I3 SAV ...TABLE TO TEST ADDRESS RECOGNITION AA WRD2 DUP3 BB WRD5 EE MASK WRD4 DD WRD3 CC LOC AA WRD2 LOC BB WRD3 LOC CC WRD4 LOC DD,,, WRD5 LOC EE BIT1 AA FF SRX10 GG TRX10 HH WID55 II CLM1 JJ TON MASK,,, KK BIT2 BB BIT1 CC BIT2 CC BIT3 DD BIT3 EE BIT1 EE,,, LL TTL'/12/ MM TST34 NN BIT3 RR BIT3 QQ WRD5 RR,,, WRD4 QQ WRD3 PP BIT1 RR BIT1 PP BIT1 NN BIT2 PP,,, BIT2 OO WRD2 OO WRD6 LOC FF,LOC GG,LOC HH,LOC II LOC JJ,LOC KK,LOC LL,LOC MM,LOC NN 1,2,3,4,5,1,2,3,4,5,1,2,3,4,5,1,2,3,4,5 1,2,3,4,5,21,21,21,21,21,21,21,21,21 BLK ...TEST OF XSY OPERATION 20TST TTL'/13/ 40FIL DUMMY1=1 THREE=3 DUMMY2=2 MASK1=1 DUMMY3=3 DUMMY4=4 MASK1=MSK.ARG. .ARG...BYTE INFO SEPARATED FROM SYMBOL DUMMY5=5 ONE=1 DUMMY6=6 +LOC AD1+LOC AD1 LOC AD2 DUMMY7=7 TWO=2 DUMMY8=8 +LOC AD2+LOC AD2 MASK2=MSK.ARG. . ...BYTE INFO ADJACENT TO SYMBOL +LOC AD1+LOC AD2 DUMMY9=9 +LOC AD3+LOC AD3 LOC AD3 LOC AD3 XSY DUMMY1 DUMMY2 DUMMY3 DUMMY4 DUMMY5,,, DUMMY6 DUMMY7 DUMMY8 DUMMY9 MASK1 AD1 ONE AD4 TWO MASK2 AD3 THREE AD2 LOC AD4 5DUP 0 18,15,30,24,26,13,13,0,1,0,2,0,3,0,11 BLK ...TEST SINGLE AND DOUBLE PARENTHESES 31TST TTL'/14/ 100SIZ 48 IOR 1LFT(1 4) 2SIZ+3LFT(1 2 3)100SIZ IOR 1LFT(1 4) 100 100 100 100 100 (100 100 100 100 100) (100 100)(100)(100 100) MASK1=MSK+2SIZ 3LFT ARG IOR 100SIZ 1LFT ARG MASK2=MSK 2SIZ+3LFT ARG 100SIZ IOR 1LFT ARG MASK1(1 2 3)(1 4) MASK1 6 (1 4) MASK1 62 1 MASK1(57 5)1 MASK2(1 2 3)(1 4) MASK2 6 (1 4) MASK2 62 1 MASK2(57 5)1 TON MASK1 (1 2 3)(1 4) 6(1 4) 62 1 (57 5)1 MASK2 (1 2 3)(1 4) 6(1 4) 62 1 (57 5)1 MSK MASK1 62)4 MASK1 (57 5))4 MASK1 (57 5) )4 MASK1 (1 2 3 4 6 7 8 9 10))100 MASK1 (1 2 3 4 6 7 8 9 10) )100 TON MASK1 62)4 (57 5))4 (57 5) )4 (1 2 3 4 6 7 8 9 10))100 (1 2 3 4 6 7 8 9 10) )100 MSK 31DUP 500 BLK ...TEST DUPLICATION OF MULTIPLE PRECISION ENTRIES 16TST TTL'/15/ 3BIT ADDRESS4 MASK=MSK ARG.,TON MASK 3DUP ADDRESS1 LOC ADDRESS3 ADDRESS2 3BIT. 2DUP ADDRESS3 LOC.ADDRESS4 NUL 2BIT ADDRESS5 3BIT ADDRESS6 3DUP ADDRESS5 2WRD ADDRESS6 NUL 3BIT ADDRESS5 1BIT ADDRESS5 8DUP 7 4 BLK ...TEST MULTIPLE PRECISION SET OPERATIONS TTL'/16/ 3DUP 2WRD ADD2 ADD1 6WRD 4BIT ADD3,,, 4WRD NUL 3BIT ADD3 2WRD 5BIT ADD4 2DUP 4WRD 2BIT ADD1 ADD3 3WRD 6BIT ADD1,,, 1BIT ADD2 3WRD ADD4 3WRD LOC.,,, 2WRD LOC ADD3 4BIT ADD1 6WRD 4BIT ADD5 ADD5 5WRD 3BIT.2BIT.,,, 2WRD 5BIT ADD6 3BIT ADD6 4WRD 4BIT ADD6 2WRD ADD6 3WRD 1BIT ADD6 4WRD 5BIT ADD5 35TST 8,1,32,2,8,1,32,2,8,1,32,2 4,13,15,16,0,8,4,13,15,16,0,8 2,0,0,16,4,8,0,4,16,1,8 BLK TTL'/17/ 12TST MASK=MSK ARG.ARG TON MASK I77=3WRD 77 5WRD 3BIT ADD2 ADD1 3WRD 2BIT ADD1,,, 7 ADD2 6 2WRD ADD3 5WRD 5BIT ADD3 LOC ADD3 I77 7,6,2,0,0,4,8,0,0,77,0,16 BLK ...TEST OF ABILITY TO RECOVER AFTER ATTEMPT TO TURN BIT ON ...IN TABLE ENTRY USED FOR DIRECT STORAGE OF BYTE INFO 42TST TTL'/18/ TWO=MSK ARG. . THREE=MSK. .ARG AA TWO LOC XX 2DUP THREE BB LOC YY 3DUP CC TWO LOC XX 3 DD 2DUP THREE LOC YY EE 3DUP TWO LOC YY FF 2DUP THREE LOC XX GG TWO LOC YY 5 2DUP THREE HH LOC XX 9BIT CC 3WRD 8BIT FF 10BIT EE 7BIT AA 8BIT BB 3WRD 7BIT DD 10BIT HH 9BIT GG XX LOC. YY LOC . 105 0,0,170,0,0,170 297,0,3,297,0,3,297,0,3 0,0,106,0,0,106 554,554,554 0,0,169,0,0,169 298,0,5 0,0,553,0,0,553 41,42 BLK TTL'/19/ 41TST ...TEST SIMPLE MASK WITH PRECISION INFORMATION MASK1=MSK ARG 3WRD 1LFT ARG 2WRD 2LFT ARG.4WRD,,, 3LFT ARG. .4LFT ARG MASK1 1 2 3 4 5 ...TEST ABILITY TO NOT GIVE EXTRA ZERO ENTRIES IF ...ARGUMENT LIST NOT FILLED MASK2=MSK ARG 2WRD ARG 3WRD ARG 4WRD ARG MASK2 1 MASK2 2 3 MASK2 4 5 6 MASK2 7 8 9 10 MASK3=MASK2.4WRD ARG MASK3 11 12 13 14 15 TON MASK3 6BIT A33 16 17 3BIT A36 18 2BIT A35 19 5BIT A31 20 3BIT A31 21 6BIT A32 6BIT A34 1BIT A35 22 2BIT A34 23 24 25 26 4BIT A31 27 1BIT A33 6BIT A35 28 6BIT A36 29 1BIT A31,,, 2BIT A31 30 A31,A32,A33,A34,A35,A36 ...PREDICTED RESULTS 1,12,4,80,32 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 31,32,33,34,35,36 BLK TTL'/20/ 41TST ...TEST SIMPLE MASK WITH PRECISION INFORMATION MASK1=MSK ARG 3WRD 1LFT ARG 2WRD 2LFT ARG.4WRD,,, 3LFT ARG. .4LFT ARG MASK1 1 2 3 4 5 ...TEST ABILITY TO NOT GIVE EXTRA ZERO ENTRIES IF ...ARGUMENT LIST NOT FILLED MASK2=MSK ARG 2WRD ARG 3WRD ARG 4WRD ARG MASK2 1 MASK2 2 3 MASK2 4 5 6 MASK2 7 8 9 10 MASK3=MASK2.4WRD ARG MASK3 11 12 13 14 15 TON MASK3 3WRD 6BIT A31 16 17 6WRD 3BIT A31 18 5WRD 2BIT A31 19 5BIT A31 20 3BIT A31 21 2WRD 6BIT A31 4WRD 6BIT A31 5WRD 1BIT A31 22 4WRD 2BIT A31 23 24 25 26 4BIT A31 27 3WRD 1BIT A31 5WRD 6BIT,,, A31 28 6WRD 6BIT A31 29 1BIT A31,,, 2BIT A31 30 A31 ...PREDICTED RESULTS 1,12,4,80,32 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 16,17,18,19,20,21,22,23,24,25,26,27,28,29,30 31,32,33,34,35,36 BLK ...TEST MULTIPLE PRECISION MASKS ...TO MAKE SURE DON'T GET TOO MANY ENTRIES ...IF LESS THAN MAXIMUM NUMBER OF ARGUMENTS TTL'/21/ 25TST MASK=MSK 3WRD ARG 1LFT ARG 2WRD 2LFT ARG.4WRD,,, 3LFT ARG 3WRD 4LFT ARG,,, 5WRD 5LFT ARG TON MASK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 MSK 0,0,1 6,0,2 10,24,4 16,36,7,0,80 24,52,11,240,112 34,72,16,320,152,672 BLK ...TEST MASKS WITH DUPLICATE OPERATOR TTL'/22/ 80TST 1,2,3,4,5,6,7,8,9,10 +LOC AA+LOC AA,MASK1=MSK-2WRD ARG-3WRD ARG MASK2=MASK1 ARG 4WRD ARG...TEST THAT PRECISION AND SIGN ...ARE NOT GOTTEN FROM FIRST ARGUMENT SPECIFICATION OF MASK1 MASK2 1 2 3 4,I1=1,I2=2,I3=3,I4=4,MASK2 I1,,, I2 I3 I4,+LOC BB+LOC BB,+LOC,,, CC+LOC CC,MASK3=MSK ARG.+ARG+,,, ARG.,I5=5,I6=6,I7=7,I8=8,MASK=MSK,I9,,, =9,I10=10,MASK3 LOC BB LOC BB LOC BB MASK4=MASK ARG+2WRD ARG+2WRD ARG,MASK3 I8,,, I9 I10,MASK4 LOC BB LOC BB LOC BB,MASK4 I5,,, I6 I7,MASK3 I1,3DUP MASK3 LOC BB LOC BB LOC BB 2DUP MASK3 LOC AA LOC AA LOC AA MASK5=MASK3 MASK3,MASK6=MASK4. .MASK4,MASK7=MASK,,, ARG.ARG.,MASK5 I1 I2 I3 I4 I5 I6 I7 3DUP MASK5 LOC AA LOC AA LOC AA LOC AA LOC,,, AA LOC AA,3DUP MASK5 LOC CC LOC BB LOC AA,,, LOC AA LOC BB LOC CC,2DUP MASK6 I6 LOC BB LOC,,, CC I7 LOC AA I8,MASK7 AA LOC AA BB LOC BB CC,,, LOC CC 1,2,3,4,5,6,7,8,9,10 156,3,-1,-2,4,3,-1,-2,4,158 160,79,158,8,19,79,158,5,13,1 79,158,79,158,79,158,78,156,78,156 1,5,4,11,7,78,156,78,156,78 156,78,156,78,156,78,156,80,157,78 159,80,157,78,159,80,157,78,159,6 159,7,86,6,159,7,86,78,79,80 BLK ...TABLE TO TEST )) AND UNMATCHED ) IN RANGE OF MASK TTL'/23/ 62TST MASK1=MSK ARG ARG ARG.10SIZ 1LFT ARG 1LFT ARG 1LFT ARG MASK1 3 3 3 2 2 2 MASK1 4)5 5 5 MASK1)3 MASK1) )2 3 TON MASK1 3 3 3 2 2 2,4)5 5 5,)3,) )2 3 MSK MASK2=MSK. .ARG ARG. . .1LFT ARG 1LFT ARG MASK2 MASK2 1 MASK2 1 2 MASK2 1 2 3 MASK2 1 2 3 4 MASK2) MASK2) ) MASK2 1)2 MASK2)1 MASK2) )1 MASK2(1 2 3 16))(1 2 3 16 MASK3=MSK.-3LFT ARG 2WRD ARG. .+2LFT ARG MASK3(1 2 3 16))(1 2 3 16 3,60,4,150,0,30,0,3,3,60 4,150,0,30,0,3,0,0,1,0 0,3,0,0,3,0,0,6,0,0 3,0,0,14,0,0,1,0,0,4 0,0,0,0,0,2,0,0,0,0 0,1,0,0,19,0,0,38,0,-176 0,88 BLK ...TABLE TO TEST MULTIPLE PRECISION BIT OPERATOR TTL'/24/ 30TST 6BPR 2BIT.5BIT.6BIT.10BIT.12BIT.14BIT.15BIT.,,, 16BIT.17BIT.21BIT.23BIT.26BIT.28BIT. 1WRD 2BIT. 1WRD 5BIT. 1WRD 6BIT.,,, 2WRD 4BIT. 2WRD 6BIT.,,, 3WRD 2BIT. 3WRD 3BIT. 3WRD 4BIT. 3WRD 5BIT.,,, 4WRD 3BIT. 4WRD 5BIT.,,, 5WRD 2BIT. 5WRD 4BIT. AA 3WRD AAA 5WRD NUL 3WRD BBB BB 5WRD NUL 3WRD 3BIT BB 21BIT DD 10BIT AA 2WRD 17BIT CC 1WRD 17BIT CC 3WRD 9BIT AA 12BIT DD 2WRD 11BIT DD 16BIT DD 2WRD 6BIT BB 28BIT AA 28BIT BB 28BIT CC 28BIT DD 6BIT AA 6BIT BB 6BIT CC 6BIT DD 11BIT AAA 9BIT BBB 9BIT CCC 11BIT DDD 2WRD 8BIT AAA 2WRD 8BIT BBB 2WRD 8BIT CCC 2WRD 8BIT DDD 5BIT AA 5BIT AAA 3BIT DDD 5BIT CC 12BIT CC 4BIT CCC 2BIT AA 2WRD 4BIT DD 2BIT DDD 5BIT BB 2BIT CC 2WRD 8BIT CC 2WRD 9BIT CC 10BIT BB 11BIT BBB 4BIT BBB 2BIT BBB 4BIT AAA 12BIT AA 2BIT BB 2BIT DD 2WRD 4BIT CC 5BIT DD 17BIT BB 14BIT AA 15BIT AA CC 3WRD CCC 5WRD NUL 3WRD DDD DD 5WRD NUL 50,40,30,20,10,50,40,30,20,10 50,40,30,20,10,50,40,30,20,10 50,40,30,20,10,50,40,30,20,10 BLK ...TABLE TO TEST MULTIPLE PRECISION BIT OPERATOR MINUS6=-6 TTL'/25/ 30TST BPR MINUS6 5BIT.2BIT.1BIT.9BIT.7BIT.17BIT.16BIT.,,, 15BIT.14BIT.22BIT.20BIT.29BIT.27BIT. 1WRD 5BIT. 1WRD 2BIT. 1WRD 1BIT.,,, 2WRD 3BIT. 2WRD 1BIT.,,, 3WRD 5BIT. 3WRD 4BIT. 3WRD 3BIT. 3WRD 2BIT.,,, 4WRD 4BIT. 4WRD 2BIT.,,, 5WRD 5BIT. 5WRD 3BIT. AA 3WRD AAA 5WRD NUL 3WRD BBB BB 5WRD NUL 3WRD 4BIT BB 22BIT DD 9BIT AA 2WRD 14BIT CC 1WRD 14BIT CC 3WRD 10BIT AA 7BIT DD 2WRD 8BIT DD 15BIT DD 2WRD 1BIT BB 27BIT AA 27BIT BB 27BIT CC 27BIT DD 1BIT AA 1BIT BB 1BIT CC 1BIT DD 8BIT AAA 10BIT BBB 10BIT CCC 8BIT DDD 2WRD 11BIT AAA 2WRD 11BIT BBB 2WRD 11BIT CCC 2WRD 11BIT DDD 2BIT AA 2BIT AAA 4BIT DDD 2BIT CC 7BIT CC 3BIT CCC 5BIT AA 2WRD 3BIT DD 5BIT DDD 2BIT BB 5BIT CC 2WRD 11BIT CC 2WRD 10BIT CC 9BIT BB 8BIT BBB 3BIT BBB 5BIT BBB 3BIT AAA 7BIT AA 5BIT BB 5BIT DD 2WRD 3BIT CC 2BIT DD 14BIT BB 17BIT AA 16BIT AA CC 3WRD CCC 5WRD NUL 3WRD DDD DD 5WRD NUL 50,40,30,20,10,50,40,30,20,10 50,40,30,20,10,50,40,30,20,10 50,40,30,20,10,50,40,30,20,10 BLK