;	THIS FILE ASSEMBLED WITH P.MAC	VERSION #2	SEPT. 1 '69
	XLIST

PDP8=1			;IF PDP8=0 SIMULATE A PDP8
PDP8I=0			;IF PDP8I=0, SIMULATE A PDP8I
PDP8S=1			;IF PDP8S=0, SIMULATE A PDP8S
PDP8L=1			;IF PDP8L=0, SIMULATE A PDP8L

MEMSIZ=2*^D4096		;SIZE OF THE SIMULATED MEMORY
DCS680=1		;IF DCS680=0, 680 LOGIC WILL BE ASSEMBLED
PLOTER=0		;IF PLOTER=0, LOGIC WILL BE ASSEMBLED FOR PLOTTER IOT'S
			;THIS CAN NOT BE ASSEMBLED WITH THE DCS680 OPTION.
DDF32=1			;IF DDF32 IS NOT 0, LOGIC WILL BE ASSEMBLED FOR
			;A DF32 DISK.   DDF32 IS THE NUMBER OF DRIVES.
DRM08=1			;IF DRM08=0, RM08 LOGIC WILL BE ASSEMBLED

PACK=1		;IF PACK IS 0 THE MEMORY WILL BE COMPILED PACKED 3
		;PDP8 WORDS TO 1 PDP10 WORD
INLINE=0	;WHEN INLINE IS 0 ASSEMBLY WILL GENERATE SOME FREQUENTLY
		;CALLED SUBROUTINES AS INLINE CODE RATEHR THAN AS 
		;SUBROUTINES CALLED WITH PUSHJ'S.
FAST=<PACK-1>!INLINE	;IF FAST=0,CERTAIN ADDITIONAL IMPROVEMENTS ARE MADE
ESTOP=0			;WHEN ESTOP=0 CERTAIN ERRORS WILL BE REPORTED VIA THE DRIVER.


,FLAGS - LEFT HALF

	RUN=1
	INTDEL=2	;INTERRUPT DELAY.
	DEFER=4
	KACTIV=10	;KEYBOARD ACTIVE
	RACTIV=20	;READER ACTIVE
	PACTIV=40	;PUNCH ACTIVE
	TACTIV=100	;TELEPRINTER ACTIVE
	DACTIV=200	;DF32 OR RM08 ACTIVE
	DRMLAT=400	;1 DURING DRUM LATENCY
	DFBCHG=1000	;1 IF WORD IN DFB
	PRACTIVE=2000	;PRINTER ACTIVE
	PLACTIVE=4000	;PLOTTER ACTIVE
	IFE DCS680,<C8ACTI=4000	;110 BAUD CLOCK ACTIVE.
	C5ACTI=10000	;50 BAUD CLOCK ACTIVE.
	L0ACTI=40000	;LINE 0 ACTIVE (680)
	L1ACTI=100000	;LINE 1 ACTIVE
	L2ACTI=200000	;LINE 2 ACTIVE
	L3ACTI=400000	;LINE 3 ACTIVE>

,FLAGS - RIGHT HALF

	PION=1		;INTERRUPT ENABLE
	RFLG=2		;READER FLAG
	PFLG=4		;PUNCH FLAG
	KFLG=10		;KEYBOARD FLAG
	TFLG=20		;TELEPRINTER FLAG
	DRRC=40		;DRUM READ CONTROL
	DRWC=100	;DRUM WRITE CONTROL
	DCFLG=200	;DF32 OR RM08 COMPLETION FLAG
	DEFLG=400	;DF32 OR RM08 ERROR FLAG(WRITE LOCK OR NONEXISTENT DISK)
	DPER=1000	;RF32 OR RM08 PARITY ERROR
	DRMDTE=2000	;DRUM DATA TIMING ERROR
	BRQFLG=4000	;BREAK REQUEST
	PRFLG=40000	;PRINTER FLAG
	INTFLG=DPER!RFLG!PFLG!KFLG!TFLG!DCFLG!PRFLG!DEFLG
IFE PLOTER,<PLFLG=10000	;PLOTER FLAG
	INTFLG=INTFLG!PLFLG>
IFE DCS680,<
	C8FLG=10000
	C5FLG=20000
	INTFLG=INTFLG!C8FLG!C5FLG>

,ACCUMULATOR ASSIGNMENTS

,	SIMULATED REGISTERS

	MQ=0		;MQ REGISTER FOR EAE - 12BITS
	PC=1		;PROGRAM COUNTER - 12BITS
	MA=2		;MEMORY ADDRESS REGISTER - 12BITS
	IR=3		;INSTRUCTION REGISTER - 3BITS
	MB=4		;MEMORY BUFFER REGISTER - 12BITS
	AC=5		;ACCUMULATOR - 13BITS

,	SIMULATOR ACS

	RUNTIM=6	;RUNTIME FOR CURRENT INSTRUCTION
	PDP=10		;PUSH DOWN POINTER
	FLAGS=11	;CONTROL FLAGS
	AC0=12		;TEMPORARY AC
	AC1=13		;TEMPORARY AC
	AC2=14		;TEMPORARY AC
	AC3=15		;TEMPORARY AC
	AC4=17		;TEMPORARY AC
	SRR=AC4		;SUBROUTINE RETURN FOR FILEIO
	DDB=16		;DEVICE DATA BLOCK
	FDB=DDB		;FILE DATA BLOCK


OPDEF	INCHRW	[TTCALL 0,]
OPDEF	OUTCHR	[TTCALL 1,]
OPDEF	INCHRS	[TTCALL 2,]
OPDEF 	OUTSTR	[TTCALL 3,]
OPDEF	INCHWL	[TTCALL 4,]
OPDEF	GETLIN	[TTCALL 6,]
OPDEF	SETLIN	[TTCALL 7,]
OPDEF	CLRBFI	[TTCALL 11,]	;CLEAR TYPEIN BUFFER

DEFINE XP(A,B)
<	A=B
	INTERNAL A>


;DEVICE DATA BLOCKS

	DRATE=0			;DEVICE INTERRUPT RATE
	DTIME=1			;TIME TILL NEXT INTERRUPT
	DFLAG=2			;LH=ACTIVE FLAG FOR SIMULATOR
				;RH=DEVICE FLAG FOR PDP8
	DDISP=3			;INTERRUPT TIME ROUTINE ADDRESS
				;IF SIGN BIT IS 0 SET ACTIVE IMMEDIATELY
;MISCELLANEOUS PARAMETERS

	LN=^D2			;NO. 680 LINES
	DSIZE=377		;LARGEST DRUM ADDRESS
	DRMROT=^D17300		;DRUM ROTATION TIME IN MILLISECONDS
	CRY0=200000		;CARRY FROM BIT 0
	DBUFLN=203		;DTA BUFFER LENGTH



IFN INLINE,	<DEFINE FETCH <PUSHJ PDP,FETCHY>
		DEFINE STORE <PUSHJ PDP,STOREY>>

IFE INLINE,	<DEFINE FETCH <
	IFN FAST,<ANDI	MA,7777		;BE SURE MA IS ONLY 12 BITS>
	MOVE	AC1,MA
	TLNE	FLAGS,DEFER	;INDIRECT
	OR	AC1,DFF		;YES
	TLZN	FLAGS,DEFER	;INDIRECT
	OR	AC1,IF		;NO
	IFE PACK,<IDIVI AC1,3	;CALCULATE CONSTANTS FOR FETPNT
	LDB MB,FETPNT(AC2)>
	IFN PACK,<MOVE MB,CORE(AC1)>>
	DEFINE STORE <
	IFN FAST,<ANDI	MA,7777		;BE SURE MA IS ONLY 12 BITS>
	MOVE	AC1,MA
	TLNE	FLAGS,DEFER	;INDIRECT
	OR	AC1,DFF		;YES
	TLZN	FLAGS,DEFER	;INDIRECT
	OR	AC1,IF		;NO
	IFE PACK,<IDIVI AC1,3	;CALCULATE CONSTANTS FOR FETPNT
	DPB MB,FETPNT(AC2)>
	IFN PACK,<MOVEM MB,CORE(AC1)>>>

IFN FAST,<DEFINE IFETCH <FETCH>
	DEFINE ISTORE <STORE>>
IFE FAST,<DEFINE IFETCH <
	MOVE	AC1,MA
	OR	AC1,IF
	MOVE	MB,CORE(AC1)>
	DEFINE ISTORE <
	MOVE	AC1,MA
	OR	AC1,IF
	MOVEM	MB,CORE(AC1)>>


	LIST