.title M9312 'DK/DT' BOOT prom for RK03/05 and TU55/56 controllers ; This source code is an exact copy of the DEC M9312 23-756A9 boot PROM. ; ; This boot PROM is for the RK03/05 DECdisk and TU55/56 DECtape controllers. ; ; Multiple units and/or CSR addresses are supported via different entry points. ; ; Standard devices are 82S131, Am27S13, 74S571 or other compatible bipolar ; PROMs with a 512x4 TriState 16pin DIP architecture. This code resides in ; the low half of the device; the top half is blank and unused. ; ; Alternatively, 82S129 compatible 256x4 TriState 16pin DIP devices can be ; used, as the uppermost address line (hardwired low) is an active low chip ; select (and will be correctly asserted low). rkcsr =177400 ; std RK03/05 DECdisk csrbase rkwc =+6-4 ; word count rkda =+12-4 ; disk address tccsr =177340 ; std TU55/56 DECtape csrbase tccs =+0-2 ; control/status tcwc =+4-2 ; word count xxwc =rkwc ; common word count offset diags =165564 ; console diags phase2 entry .asect .=173000 ; -------------------------------------------------- start: .ascii "KD" ; device code (reversed) .word next-. ; offset to next boot header dk0n: sec ; boot std csr, unit zero, no diags dk0d: mov #0,r0 ; boot std csr, unit zero, with diags dkNr: mov #rkcsr+4,r1 ; boot std csr, unit dkNb: mov pc,r4 ; boot csr , unit bcc diag ; br if diags requested br disk ; return to (R4)+2 from diags ; then skip over pseudo reboot vector ; -------------------------------------------------- .word 173000 ; prom start addess @ 24 .word 340 ; and priority level @ 26 ; -------------------------------------------------- next: .ascii "TD" ; device code (reversed) .word last-. ; offset to next boot header dt0n: sec ; boot std csr, unit zero, no diags dt0d: mov #0,r0 ; boot std csr, unit zero, with diags dtNr: mov #tccsr+2,r1 ; boot std csr, unit dtNb: mov pc,r4 ; boot csr , unit bcc diag ; br if diags requested ; return to (R4)+2 from diags ; then skip over pseudo reboot vector tape: mov r0,r3 ; get unit number swab r3 ; into high byte mov r3,(r1) ; store in controller bis #4003,(r1) ; set REVERSE and RNUM+GO 1$: tst (r1) ; test error bit bpl 1$ ; loop until error set (at BOT) tst tccs(r1) ; read control/status mov r3,(r1) ; set unit number in controller br common ; continue disk: mov r0,r3 ; get unit number clc ; C=0 for ror ror r3 ; shift into 15:12 ror r3 ; ror r3 ; ror r3 ; mov r3,rkda(r1) ; unit number, sector 0 to disk addr common: mov #-512.,xxwc(r1) ; set word count bis #5,r3 ; command READ+GO mov r3,(r1) ; execute 2$: tstb (r1) ; test ready bpl 2$ ; loop tst (r1) ; check error bpl 3$ ; br if no error reset ; reset the world jmp 2(r4) ; and retry 3$: bic #377,(r1) ; nop command clr pc ; jump to loaded boot sector ; -------------------------------------------------- diag: jmp @#diags ; jump to console diags ; -------------------------------------------------- dk2n: sec ; boot std csr, unit two, no diags dk2d: mov #2,r0 ; boot std csr, unit two, with diags br dkNr ; continue ; -------------------------------------------------- .word 0 ; unused ; -------------------------------------------------- .=start+176 crc16: .word <124650> ; CRC-16 will go here last: ; next boot prom starts here .end