.title M9312 'DX' BOOT prom for RX11 compatible controller ; This source code is an exact copy of the DEC M9312 23-753A9 boot PROM. ; ; This boot PROM is for any RX11/RX01 compatible floppy controller. ; ; Multiple units and/or CSR addresses are supported via different entry points. ; ; Standard devices are 82S131, Am27S13, 74S571 or other compatible bipolar ; PROMs with a 512x4 TriState 16pin DIP architecture. This code resides in ; the low half of the device; the top half is blank and unused. ; ; Alternatively, 82S129 compatible 256x4 TriState 16pin DIP devices can be ; used, as the uppermost address line (hardwired low) is an active low chip ; select (and will be correctly asserted low). rxcsr =177170 ; std RX11 csrbase rxcs =+0 ; command/status rxdb =+2 ; data buffer diags =165564 ; console diags phase2 entry .asect .=173000 ; -------------------------------------------------- start: .ascii "XD" ; device code (reversed) .word last-. ; offset to next boot header dx0n: sec ; boot std csr, unit zero, no diags dx0d: mov #0,r0 ; boot std csr, unit zero, with diags dxNr: mov #rxcsr,r1 ; boot std csr, unit dxNb: mov pc,r4 ; boot csr , unit bcc diag ; br if diags requested br go ; return to (R4)+2 from diags ; then skip over pseudo reboot vector ; -------------------------------------------------- .word 173000 ; prom start addess @ 24 .word 340 ; and priority level @ 26 ; -------------------------------------------------- go: clc ; clear carry mov #<003*400>+007,r3 ; unit zero, read+go bitb #1,r0 ; test unit ID beq 2$ ; br if zero mov #<023*400>+027,r3 ; unit one, read+go 2$: bitb #100040,(r1) ; test error<15> or done<5> beq 2$ ; neither, keep looping movb r3,(r1) ; exec read+go on unit 3$: movb (r1),r5 ; wait for transfer req bpl 3$ ; not yet, keep looping movb #1,rxdb(r1) ; set track/sector 1 rorb r3 ; 007 -> 003 -> 001 -> 000 bvs 3$ ; loop three times 4$: bit #100040,(r1) ; test error<15> or done<5> beq 4$ ; neither, keep looping bmi 6$ ; br if error swab r3 ; R3=003/023 unit0/1 movb r3,(r1) ; exec emptybuf+go on unit clr r3 ; bus address ptr 5$: tstb (r1) ; wait for data transfer req bpl 5$ ; loop if not yet movb rxdb(r1),(r3)+ ; store data byte tstb r3 ; check address >= 128 bpl 5$ ; br if address in 0..127 clr pc ; jump to bootstrap at zero 6$: reset ; failed, reset controller jmp 2(r4) ; and retry from the beginning ; -------------------------------------------------- dx1n: mov #1,r0 ; boot std csr, unit one, no diags sec ; br dxNr ; continue dx1d: mov #1,r0 ; boot std csr, unit one, ? diags br dxNr ; continue ; -------------------------------------------------- diag: jmp @#diags ; jump to console diags ; -------------------------------------------------- .word 0,0,0,0,0,0 ; unused ; -------------------------------------------------- .=start+176 crc16: .word <105572> ; CRC-16 will go here last: ; next boot prom starts here .end